System Wrap And Deliver Data; Wrap Interleave Order - Compaq EV68A Hardware Reference Manual

Compaq microprocessor reference manual
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point is the QW pointed to by the 21264/EV68A; however, some systems may find it
more beneficial to begin the transfer elsewhere. The system must always indicate the
starting point to the 21264/EV68A. The wrap order for subsequent QWs is interleaved.
Table 4–29 defines the method for systems to specify wrap and deliver data.
Table 4–29 System Wrap and Deliver Data
Source/
Destination
SysDc[4:2]
Memory
100 (ReadData)
Memory
101(ReadDataDirty)
Memory
110 (ReadDataShared)
Memory
111(Read DataShared/Dirty)
Memory
010 (WriteData)
I/O
100 (ReadData)
I/O
100 (ReadData)
I/O
100 (ReadData)
I/O
010 (WriteData)
I/O
010 (WriteData)
I/O
010 (WriteData)
Note 1:
Note 2:
Table 4–30 defines the interleaved scheme for the wrap order.
Table 4–30 Wrap Interleave Order
First quadword
Second quadword
Third quadword
Fourth quadword
Fifth quadword
21264/EV68A Hardware Reference Manual
SysDc[1:0]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[4:3]
SysAddOut_L[4:3]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
SysAddOut_L[5:4]
Transfers to and from the 21264/EV68A have eight data cycles for a total
of eight quadwords. The starting point is defined by the system. The pre-
ferred starting point is the one pointed to by SysAddOut_L[5:4]. Systems
can insert the SysAddOut_L[5:4] into the SysDc[1:0] field of the com-
mand. See Table 4–30 for the wrap order.
LW and byte/word read transfers differ from all other transfers. The system
unloads only four QWs of data into eight data cycles by sending each QW
twice (referred to as double-pumped data transfer). The first QW returned
is determined by SysAddOut_L[4:3]. The system again may elect to
choose its own starting point for the transfer and insert that value into
SysDc[1:0]. See Table 4–31 for the wrap order.
PA Bits [5:3] of Transferred QW
000
010
001
011
010
000
011
001
100
110
System Port
Size
Block (64 Bytes)
Block (64 Bytes)
Block (64 Bytes)
Block (64 Bytes)
Block (64 Bytes)
QW (8-64 Bytes)
LW(4-32 Bytes)
Byte/Word
QW (8-64 Bytes)
LW(4-32 Bytes)
Byte/Word
100
110
101
111
110
100
111
101
000
010
Cache and External Interfaces
Rules
See Note 1
See Note 1
See Note 1
See Note 1
See Note 1
See Note 1
See Note 2
See Note 2
See Note 1
See Note 1
See Note 1
4–37

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