Bcache Forwarding Clock Pin Groupings; Late-Write Non-Bursting Ssrams Data Pin Usage; Late-Write Non-Bursting Ssrams Tag Pin Usage - Compaq EV68A Hardware Reference Manual

Late-Write Non-Bursting SSRAMs
Table E–1
Pad and Pin
BcTagShared_H
BcTagDirty_H
BcTagValid_H
E.2 Late-Write Non-Bursting SSRAMs
Table E–2 provides the data pin connections between late-write non-bursting SSRAMs
and the 21264/EV68A or the system board. Table E–3 provides the same information
for the tag pins.
Data Pin Usage
Table E–2 Late-Write Non-Bursting SSRAMs Data Pin Usage
21264/EV68A Signal Name or Board Connection
BcAdd_H[21:4]
BcDataOutClk_H[3:0]
Set from board to 1/2 the 21264/EV68A core voltage CK_L
BcData_H[127:0]/BcCheck_H[15:0]
BcDataWr_L
Unconnected
Unconnected
Unconnected
Unconnected
From board, pull down to VSS
From board, pull down to VSS
From board, pull down to VSS or BcDataOE_L
Tag Pin Usage
Unused Bcache tag pins should be pulled to ground through a 200-ohm resistor.
Table E–3 Late-Write Non-Bursting SSRAMs Tag Pin Usage
21264/EV68A Signal Name or Board Connection
BcAdd_H[22:6]
BcTag_H[42:20]
BcTagOE_L or from board, pull down to VSS
BcTagWr_L
From board, pull down toVSS
BcTagOutClk_H
21264/EV68A-to-Bcache Pin Interface
E–2
Bcache Forwarding Clock Pin Groupings (Continued)
Input Clock
BcTagInClk_H
BcTagInClk_H
BcTagInClk_H
Output Clocks
BcTagOutClk_x
BcTagOutClk_x
BcTagOutClk_x
Late-Write SSRAM Data Pin Name
SA_H[17:0]
CK_H
DQx
SW_L
Tck_H
Tdo_H
Tms_H
Tdi_H
G_L
SBx_L
SS_L (Vendor dependent)
Late-Write SSRAM Tag Pin Name
SA_H[16:0]
DQx
SS_L (Vendor dependent)
SW_L
SBx_L
CK_H
21264/EV68A Hardware Reference Manual