Ev68A Signal Descriptions By Function - Compaq EV68A Hardware Reference Manual

21264/EV68A Signal Names and Functions
Table 3–2 21264/EV68A Signal Descriptions (Continued)
Signal
SysVref
Tck_H
Tdi_H
Tdo_H
TestStat_H
Tms_H
Trst_L
Table 3–3 lists signals by function and provides an abbreviated description.
Table 3–3 21264/EV68A Signal Descriptions by Function
Signal
BcVref Domain
BcAdd_H[23:4]
BcCheck_H[15:0]
BcData_H[127:0]
BcDataInClk_H[7:0]
BcDataOE_L
BcDataOutClk_H[3:0]
BcDataOutClk_L[3:0]
BcDataWr_L
BcLoad_L
BcTag_H[42:20]
BcTagDirty_H
BcTagInClk_H
BcTagOE_L
BcTagOutClk_H
BcTagOutClk_L
BcTagParity_H
BcTagShared_H
BcTagValid_H
BcTagWr_L
Hardware Interface
3–6
Type Count Description
I_DC_REF 1 System interface reference voltage.
I_DA 1 IEEE 1149.1 test clock.
I_DA 1 IEEE 1149.1 test data-in signal.
O_OD_TP 1 IEEE 1149.1 test data-out signal.
O_OD_TP 1 Test status pin. System reset drives the test status pin low.
The TestStat_H pin is forced high at the start of the Icache
BiST. If the Icache BiST passes, the pin is deasserted at the end
of the BiST operation; otherwise, it remains high.
The 21264/EV68A generates a timeout reset signal if an
instruction is not retired within one billion cycles.
The 21264/EV68A signals the timeout reset event by output-
ting a 256 GCLK cycle wide pulse on TestStat_H.
I_DA 1 IEEE 1149.1 test mode select signal.
I_DA 1 IEEE 1149.1 test access port (TAP) reset signal.
Type Count Description
O_PP 20 Bcache index.
B_DA_PP 16 ECC check bits for BcData_H[127:0].
B_DA_PP 128 Bcache data.
I_DA 8 Bcache data input clocks.
O_PP 1 Bcache data output enable.
O_PP 8 Bcache data output clocks.
O_PP 1 Bcache data write enable.
O_PP 1 Bcache burst enable.
B_DA_PP 23 Bcache tag bits.
B_DA_PP 1 Tag dirty state bit.
I_DA 1 Bcache tag input clock.
O_PP 1 Bcache tag output enable.
O_PP 2 Bcache tag output clocks.
B_DA_PP 1 Tag parity state bit.
B_DA_PP 1 Tag shared state bit.
B_DA_PP 1 Tag valid state bit.
O_PP 1 Tag RAM write enable.
21264/EV68A Hardware Reference Manual