Reset Status Register (Rstat) - Kontron AM4024 User Manual

3.3.2 Reset Status Register (RS TAT)
The Reset Status Register is used to determine the host's reset source.
Table 26: Reset Status Register (RSTAT)
ADDRESS
BIT 7
NAME
PORS
R/W
ACCESS
RESET
N/A
BITFIELD
7 PORS Power-on reset status:
0 = System reset generated by warm reset
1 = System reset generated by power-on (cold) reset
Writing a '1' to this bit clears the bit.
5 SRST Sof tware reset status:
0 = Reset is logged by the MMC
1 = Reset is not logged by MMC
The uEFI BIOS / sof tware sets this bit to inform the MMC that the next reset should not be
logged.
3 IPRS MMC reset status:
0 = System reset not generated by MMC
1 = System reset generated by MMC
Writing a '1' to this bit clears the bit.
0 WTRS Watchdog timer reset status:
0 = System reset not generated by Watchdog timer
1 = System reset generated by Watchdog timer
Writing a '1' to this bit clears the bit.
Note: The Reset Status Register is set to default values by power-on (cold) reset, not by a warm
reset.
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6 5
SRST
Reserved Reser ved
R/W
R
0
0
0x285
4 3 2
IPRS
Reser ved
R/W
R R
0
0 0
DESCRIPTION
User Guide
AM4024(E)
1 0
Reserved WTRS
R R/W
0 0
43