Clock; Reset; Boot Mode; Swd Interface - ST STM32C0 Series Getting Started

6.1.1

Clock

Two clock sources are used:
• HSE: X1, an 8 MHz crystal for the microcontroller
• LSE: X2, a 32.768 kHz crystal for the embedded RTC
Refer to Section 2
6.1.2

Reset

The reset signal in
tools via the connector CN1. Refer to
Note: By default the reset holder is activated on STM32C0 series devices. Any internal reset results in pulling down
NRST pin until it reaches its V
6.1.3

Boot mode

The boot option is configured by default through option bytes. BOOT0 pin can be used if user wants to have a
physical control on boot entry point after reprogramming the option byte.
6.1.4

SWD interface

The reference design shows the connection between an MCU of the STM32C0 Series and a standard SWD
connector. Refer to
Note: It is recommended to connect the reset pin to be able to reset the application from the tool.
6.1.5

Power supply

Refer to Section 1.1 Power
6.1.6

Pinouts and pin description

Refer to the datasheets available on
AN5673 - Rev 2
Clocks.
Figure 13 is active low. The reset sources include the reset button (B1) and the debugging
Section 1.3
threshold, ensuring that the capacity on this line is fully discharged.
IL
Section 4 Debug management.
supplies.
www.st.com
Reset.
for the pinout information and pin description of each device.
AN5673
Description of reference design
page 25/32