Holtek HT49RU80 Manual page 14

If the WDT clock source chooses the internal WDT oscil-
lator as its clock source, the time-out period may vary
with temperature, VDD, and process variations. If the
clock source is chosen to be the instruction clock, then
when the power down mode is entered, it must be noted
that the WDT will stop counting and lose its protective
function.
When the device operates in a noisy environment, using
the WDT oscillator is strongly recommended, since the
power down mode will stop the system clock.
The WDT overflow under normal operation initialises a
²chip reset² and sets the status bit ²TO². In the power
down mode, the overflow initialises a ²warm reset², and
only the program counter and SP are reset to zero. To
clear the WDT contents, there are three methods to be
adopted. These are an external reset (a low level on the
RES pin), a software instruction, and a ²HALT² instruction.
There are two methods of using software instructions to
clear the Watchdog Timer, one of which must be chosen
by configuration option. The first option is to use the sin-
gle ²CLR WDT² instruction while the second is to use
the two commands ²CLR WDT1² and ²CLR WDT2². For
the first option, a simple execution of ²CLR WDT² will
clear the WDT while for the second option, both ²CLR
WDT1² and ²CLR WDT2² must both be executed to
successfully clear the WDT. Note that for this second
option, if ²CLR WDT1² is used to clear the WDT, succes-
sive executions of this instruction will have no effect,
only the execution of a ²CLR WDT2² instruction will
clear the WDT. Similarly after the ²CLR WDT2² instruc-
tion has been executed, only a successive ²CLR WDT1²
instruction can clear the Watchdog Timer.
Multi-function Timer
These devices provide a multi-function timer for the
WDT, time base and RTC but with different time-out pe-
riods. The multi-function timer consists of an 8-stage di-
vider and a 7-bit prescaler, with the clock source coming
from the WDT OSC, the RTC OSC or the instruction
clock which is the system clock divided by 4. The
multi-function timer also provides a selectable fre-
quency signal, ranging from f
driver circuits, and a selectable frequency signal, ranging
2 9
from f /2 to f /2 , for the buzzer output selectable by
S S
configuration options. To obtain a proper display, it is
recommended that a frequency as near as possible to
4kHz is selected for the LCD driver circuits.
Rev. 1.10
2 8
/2 to f /2 , for the LCD
S S
Real Time Clock
14
HT49RU80/HT49CU80
Time Base
The time base offers a periodic time-out period to gener-
ate a regular internal interrupt. Its time-out period
12 15
ranges from /2 to f /2 selected by a configuration op-
S
tion. If a time base time-out occurs, the related interrupt
request flag, TBF, will be set. If the interrupt is enabled,
and the stack is not full, a subroutine call to location 18H
will take place. The time base time-out signal can also
be applied as a clock source to Timer/Event Counter 1 in
order to get a longer time-out period.
Real Time Clock - RTC
The real time clock, abbreviated as RTC, is operated in
the same manner as the time base in that it is used to
supply a regular internal interrupt. Its time-out period
8 15
ranges from f /2 to f /2 the actual value setup by soft-
S S
ware programming . Writing data to the RT2, RT1 and
RT0 bits in the RTCC register provides various time-out
periods. If an RTC time-out occurs, the related interrupt
request flag, RTF, will be set. If the interrupt is enabled,
and the stack is not full, a subroutine call to location 18H
will take place. The real time clock time-out signal can
also be used as a clock source for Timer/Event Counter
0 in order to get longer time-out periods.
RT2 RT1 RT0 RTC Clock Divided Factor
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Note: ²*² not recommended to be used
8
2 *
9
2 *
10
2 *
11
2 *
12
2
13
2
14
2
15
2
March 2, 2007