Taiwan Commate Computer Inc. PV-DDR User Manual page 27

Key in a HEX number to control AGP output buffer drive strength.
Min = 00, Max = FF.
3.4.13 AGP Fast Write
This item allows Enabled or Disabled AGP fast write function.
3.4.14 AGP Master 1 WS Write
This implements a single delay when writing to the AGP Bus. By default,
two-wait states are used by the system, allowing for greater stability.
3.4.15 AGP Master 1 WS Read
This implements a single delay when reading to the AGP Bus. By default,
two-wait states are used by the system, allowing for greater stability.
CMOS Setup Utility - Copyright ( C ) 1984 - 2001 Award Software
CPU to PCI Write Buffer
PCI Master 0 WS Write
PCI Delay Transaction
Exit F1 : General Help
Optimized Defaults
3.4.16 CPU to PCI Write Buffer
CPU & PCI Bus Control
[Enabled]
[Enabled]
[Enabled]
¯ ® ¬: Move
Enter : Select
F5 : Previous Value
Item Help
Menu Level >
+/-/PU/PD : Value F10 : Save ESC :
F6 : Fail-Safe Defaults F7 :