Taiwan Commate Computer Inc. PV-DDR User Manual page 24

These settings are intended for the Advanced Chipset function on the
motherboard. Fine tuning these options, enhances the performance of the
system.
Figure 3.4 Advanced Chipset Features Screen
CMOS Setup Utility - Copyright ( C ) 1984 - 2001 Award Software
>DRAM Clock/Drive Control
>AGP & P2P Bridge Control
>CPU & PCI Bus Control
Memory Hole
System BIOS Cacheable
Video RAM Cacheable
Memory Parity/ECC Check
Exit F1 : General Help
Optimized Defaults
3.4.1 DRAM Clock/Drive Control
If you want to set DRAM clock and timing, simple move the highlight to the
field and press <Enter>.
CMOS Setup Utility - Copyright ( C ) 1984 - 2001 Award Software
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
DRAM Timing
X SDRAM Cycle Length
X Bank Interleave
DRAM Command Rate
Advanced Chipset Features
[Press Enter]
[Press Enter]
[Press Enter]
[Disabled]
[Enabled]
[Enabled]
[Disabled]
¯ ® ¬: Move
Enter : Select
F5 : Previous Value
DRAM Clock/Drive Control
100 MHz
133 MHz
[By SPD]
[By SPD]
2.5
Disabled
2T Command
Item Help
Menu Level >
+/-/PU/PD : Value F10 : Save ESC :
F6 : Fail-Safe Defaults
Item Help
Menu Level >
F7 :