Detailed Description
3.1.1.1 Signal Definitions
The DAC63004WCSP-EVM provides access to all DAC pins through connection J1 and J2.
Table 3-2
list the J1 and J2 pin definitions. J8 and J9 provide access to the current outputs when the optional
components are populated.
8
DAC63004WCSP-EVM User's Guide
Table 3-3
and
Table 3-4
list the J8 and J9 pin definitions.
Table 3-1. DAC63004WCSP-EVM J1 Pin Definitions
Pin#
Signal
1
GND
Ground
2
DAC_SDI
SPI SDI signal for DAC
3
DAC_SYNC
SPI SYNC signal for DAC
4
DAC_SDA
I
5
GND
Ground
6
GND
Ground
7
NC
Not connected
8
FTDI_GPIO3
GPIO3 output of the onboard controller
9
DAC_GPIO
GPIO Input for DACx3004W
10
DAC_VREF
DAC_VREF
11
DAC_VREF
VREF input to the DAC
12
DAC_CAP
LDO bypass capacitor
13
DAC_FB0
Feedback pin for DAC VOUT0
14
DAC_OUT0
Output pin for DAC VOUT0
15
DAC_OUT1
Output pin for DAC VOUT1
16
DAC_FB1
Feedback pin for DAC VOUT1
Table 3-2. DAC63004WCSP-EVM J2 Pin Definitions
Pin#
Signal
1
DAC_VDD
VDD power supply for DAC
2
DAC_SCLK
SPI SCLK
3
DAC_SDO
SPI SDO
4
DAC_SCL
I
5
EXT_REF
External reference input for DAC
6
GND
Ground
7
GND
Ground
8
GND
Ground
9
NC
Not connected
10
NC
Not connected
11
DAC_FB3
Feedback pin for DAC VOUT3
12
DAC_OUT3
Output pin for DAC VOUT3
13
GND
Ground
14
GND
Ground
15
DAC_OUT2
Output pin for DAC VOUT2
16
DAC_FB2
Feedback pin for DAC VOUT2
Table 3-3. DAC63004WCSP-EVM J8 Pin Definitions
Pin#
Signal
1
IOUT0
Current output connection for Q1
2
IOUT1
Current output connection for Q2
Table 3-4. DAC63004WCSP-EVM J9 Pin Definitions
Pin#
Signal
1
IOUT2
Current output connection for Q3
2
IOUT3
Current output connection for Q4
Copyright © 2022 Texas Instruments Incorporated
Description
2
C SDA
Description
2
C SCL
Description
Description
www.ti.com
Table 3-1
and
SLAU879 – DECEMBER 2022
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