Texas Instruments DAC5686 EVM User Manual
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Texas Instruments DAC5686 EVM User Manual

Texas Instruments DAC5686 EVM User Manual

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DAC5686 EVM
User's Guide
January 2004
Wireless Infrastructure Products
SLWU006

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Summary of Contents for Texas Instruments DAC5686 EVM

  • Page 1 DAC5686 EVM User’s Guide January 2004 Wireless Infrastructure Products SLWU006...
  • Page 2 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2004, Texas Instruments Incorporated...
  • Page 5 ........... . . DAC5686 EVM Operational Procedure .

  • Page 6: Table Of Contents

    Contents Physical Description ............. PCB Layout .
  • Page 7 3−1 DAC5686 EVM Parts List ............
  • Page 8 Contents...
  • Page 9 Chapter 1 Overview This user’s guide document gives a general overview of the DAC5686 evaluation module (EVM) and provides a general description of the features and functions to be considered while using this module. Topic Page Purpose ............EVM Basic Functions .
  • Page 10 In addition to the internal bandgap reference provided by the DAC5686 device, options on the EVM allow an external reference to be provided to the DAC. The DAC5686 EVM allows the user to program the DAC5686 internal registers with the supplied computer parallel port cable and serial interface software.
  • Page 11 Procedure, for instructions on operating the serial interface software. 1.5 Hardware Configuration The DAC5686 EVM can be set up in a variety of configurations to accommodate a specific mode of operation. Before starting evaluation, the user should decide on the configuration and make the appropriate connections or changes.
  • Page 12 Hardware Configuration for this option to work properly. In order to preserve the specified perfor- mance of the DAC5686 converter, the clock sources must feature very low jitter. Using a clock with a 50% duty cycle gives optimum dynamic perfor- mance.
  • Page 13 Chapter 2 DAC5686 EVM Operational Procedure This chapter describes the serial interface GUI. Topic Page Starting the Serial Interface Program ......
  • Page 14 Starting the Serial Interface Program 2.1 Starting the Serial Interface Program Start the software by running C:\dac5686\dac5686.exe. The GUI that appears as shown in Figure 2−1 should now be visible. Power up the EVM. After power up, depress switch S1 to reset the DAC5686 device. The hardware and software are now ready for testing.
  • Page 15 When this switch is on, it allows a digital NCO to generate the mixing local oscillator in single sideband or quad mod modes. The NCO is operational up to 350-MHz DAC update clock. When it is off, single sideband and quad mod modes use a fixed f /4 mix frequency. DAC5686 EVM Operational Procedure...
  • Page 16 Starting the Serial Interface Program 2.1.12 SIF Sel Selects a 3-wire or 4-wire serial interface. This software version only supports the 3-wire setting at this time, and therefore users must keep this switch set to 3-wire setting. 2.1.13 2s Complement Enables 2s complement input data format when the switch is on.
  • Page 17 Read back all registers or write all panel settings to the DAC5686 device. 2.1.28 Save Serial Regs and Load Serial Registers Allows saving register settings to or loading from a file. 2.1.29 NT Loaded Indicates that the driver (DLL) loaded correctly. This must always be green. DAC5686 EVM Operational Procedure...

  • Page 19: Physical Description

    Chapter 3 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. Topic Page PCB Layout ..........Parts List .

  • Page 20: Pcb Layout

    PCB Layout 3.1 PCB Layout The EVM is constructed on a 4-layer, 5.1-inch x 6.1-inch, 0.062-inch thick PCB using FR-4 material. Figure 3−1 through Figure 3−4 show the PCB layout for the EVM. Figure 3−1. Top Layer 1...
  • Page 21 PCB Layout Figure 3−2. Layer 2, Ground Plane Physical Description...
  • Page 22 PCB Layout Figure 3−3. Layer 3, Power Plane...

  • Page 23: Bottom Layer

    PCB Layout Figure 3−4. Bottom Layer Physical Description...

  • Page 24: Parts List

    Parts List 3.2 Parts List Table 3−1 lists the parts used in constructing the EVM. Table 3−1. DAC5686 EVM Parts List Bill Of Material For DAC5686 Value Qty. Part Number Vendor Ref Des Not Installed Capacitors 47 µF, tantalum, 10%, 10 V...
  • Page 25 Parts List Table 3−1. DAC5686 EVM Parts List (Continued) Bill Of Material For DAC5686 Value Qty. Part Number Vendor Ref Des Not Installed Ferrite Beads, Connectors, Jumpers, Jacks, ICs, etc. Ferrite bead EXC−ML32A680U FB1−FB6 SMA connectors 713−4339 Allied J2−J6, J18, J19 (901−144−8RFX)
  • Page 27 Chapter 4 Circuit Description This chapter describes the circuit functions of the DAC5686 EVM. Topic Page Input Clocks ..........

  • Page 28: Input Clocks

    4.2 Input Data The DAC5686 EVM can accept 1.8-V or 3.3-V CMOS logic level data inputs through the 34-pin headers J13 and J14 per Table 4−1 and Table 4−2. The board provides 50-Ω termination to ground and series dampening resistors to minimize digital ringing and switching noise.

  • Page 29: Output Data

    CMOS data bit 15 (MSB) CMOS data bit 7 CMOS data bit 8 4.3 Output Data The DAC5686 EVM can be configured to drive a doubly terminated 50-Ω cable or provide unbuffered differential outputs. 4.3.1 Transformer-Coupled Signal Output The factory-set configuration of the demonstration board provides the user with single-ended output signals at SMA connectors J5 and J19.

  • Page 30: Pll Lock

    The DAC5686 device has six discrete inputs to control the operation of the device. 4.4.1 Sleep Mode The DAC5686 EVM provides a means of placing the DAC5686 device into a power-down mode. This mode is activated by placing a jumper between pins 5 and 6 on header J15. 4.4.2 Reset The DAC5686 EVM provides a means of resetting the DAC5686 device.

  • Page 31: Internal Reference Operation

    Internal Reference Operation 4.5 Internal Reference Operation The full-scale output current is set by applying an external resistor (R1) between the BIASJ pin of the DAC5686 device and ground. The full-scale output current can be adjusted from 20 mA down to 2 mA by varying R1 or changing the externally applied reference voltage.

  • Page 33: Schematics

    Chapter 5 Schematics This chapter contains the DAC5686 EVM schematic diagrams. Schematics...
  • Page 34 Revision History +3.3VA ECN Number Approved IOVDD +3.3VA +3.3VA +3.3VA .1uF .1uF .1uF .1uF .1uF 10uF +1.8VD (2-3) (Note 1) SW-PB (Note 1) IOUTA .1uF .1uF RESET RESET (Sh 2) +1.8VD +1.8VD (Note 1) T4-1-KK81 .1uF .1uF +3.3VA +3.3VA .1uF .1uF .1uF .1uF...
  • Page 35 DATA PORT 1 DA15 DA14 DA13 DA12 DA11 DA10 IOVDD (SH 1) DA(0..15) 34PIN_IDC SLEEP (SH 1) SLEEP PHSTR (SH 1) PHSTR TXENABLE (SH 1) TXENABLE QFLAG (SH 1) QFLAG DATA PORT 2 RESET (SH 1, 5) RESET 3 ROW 30 PIN CONNECTOR DB10 DB11 DB12...
  • Page 36 +3.3VCLK (Note 1) CLK1 (SH 1) CLK1 CLK1 .01uF (Note 1) CLK1C (SH 1) CLK1C TCM4-1W_MOD +3.3VCLK (Note 1) CLK2 (SH 1) CLK2 CLK2 .01uF (Note 1) CLK2C (SH 1) CLK2C TCM4-1W 12500 TI Boulevard. Dallas, Texas 75243 Title: NOTES: DAC5686 1.
  • Page 37 +3.3V_SER +3.3V_SER +3.3V_SER .1uF .1uF .1uF SN74HCT14 SN74HCT14 DB25F-RA SN74HC241 SDEN OE1_ SCLK SDIO SDIO (Sh 1) SDIO SCLK (Sh 1) SCLK SDENB (Sh 1) SDENB (Note 1) (Sh 1) 12500 TI Boulevard. Dallas, Texas 75243 Title: DAC5686 Engineer: J. SETON DOCUMENTCONTROL # NOTE 1.
  • Page 38 +3.3VA +3.3VA IOVDD (1-2) +1.8VD + C27 + C28 10uF 0.01uF 47 uF 10uF 0.01uF 47 uF BLACK +3.3V_SER +1.8VD + C31 + C30 10uF 0.01uF 47 uF 47 uF 10uF 0.01uF BLACK +3.3VPLL (2-3) + C32 10uF 0.01uF 47 uF +3.3VCLK + C35 10uF...

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