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NJU3715G-W(IC802) : L.E.D.Driver
1.Pin layout
D3
1
D4
2
D5
3
D6
4
D7
5
VSS
6
STLED
7
PONLED
8
PROGLED
9
DDPLED
10
ALED
11
2.Block diagram
DATA
CLK
Shift
resistor
STB
Control Circuit
CLR
3.Pin function
I/O
PIN No.
O
1~5
-
6
O
7~11
STLED,PONLED,PROGLED
I
12
I
13
I
14
I
15
I
16
-
17
I
18
O
19~21
-
22
22
VCC
21
D2
20
D1
19
DCH
18
MUTE
17
16
READY
15
CLR
14
STB
13
CLK
12
DATA
Latch
circuit
Symbol
D3~D7
VSS
DDPLED,ALED
DATA
CLK
ST
CLR
READY
MUTE
DCH,D1,D2
VCC
P1
P2
P3
P4
P5
P15
P16
Function
Parallel conversion data output terminal.
Connect to GND.
Parallel conversion data output terminal.
Serial data input terminal.
Clock signal input terminal.
Strobe signal input terminal.
Clear signal input terminal.
Ready signal input.
Non connect.
Muting signal input.
Parallel conversion data output terminal.
Power supply terminal.
XV-F80BK/XV-F85GD
1-49
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