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XV-F80BK/XV-F85GD
Description of major ICs
74LCX373MTC-X(IC512,IC513)
1.Pin layout
OE
1
20
VCC
Q0
2
19
Q7
D0
3
18
D7
D1
4
17
D6
Q1
5
16
Q6
Q2
6
15
Q5
D2
7
14
D5
D3
8
13
D4
Q3
9
12
Q4
GND
10
11
LE
BA5983FM-X (IC271) : 4CH DRIVER
1.Block diagram
27
28
Vcc
1
2
2.Pin function
Pin No.
Symbol
I/O
1
BIAS IN
I
2
OPIN1(+)
I
3
I
OPIN1(-)
4
OPOUT1
O
5
OPIN2(+)
I
6
I
OPIN2(-)
7
OPOUT2
O
8
-
GND
9
I
STBY1
10
PowVcc1
-
11
O
VO2(-)
12
O
VO2(+)
13
VO1(-)
O
14
O
VO1(+)
1-32
2.Pin function
Symbol
Description
D0~D7
Data inputs
LE
Latch enable input
OE
Output enable input
Q0~Q7
3-State latch outputs
26
25
24
23
10k
10k
20k
10k
10k
10k
5
3
4
6
Function
Input for Bias-amplifier
Non inverting input for CH1 OP-AMP
Inverting input for CH1 OP-AMP
Output for CH1 OP-AMP
Non inverting input for CH2 OP-AMP
Inverting input for CH2 OP-AMP
Output for CH2 OP-AMP
Substrate ground
Input for CH1/2/3 stand by control
Vcc for CH1/2 power block
Inverted output of CH2
Non inverted output of CH2
Inverted output of CH1
Non inverted output of CH1
3.Truth table
LE
X
H
H
L
H = HIGH Voltage level
L = LOW Voltage level
Z = High impedance
X = Immaterial
Q0 = Previous Q0 before HIGH to LOW transition of latch enable
22
21
20
STAND BY
CH4
20k
10k
STAND BY
CH1/2/3
7
8
9
Pin No.
Symbol
VO4(+)
15
VO4(-)
16
VO3(+)
17
VO3(-)
18
PowVcc2
19
STBY2
20
GND
21
OPOUT3
22
OPIN3(-)
23
OPIN3(+)
24
OPOUT4
25
OPIN4(-)
26
OPIN4(+)
27
PreVcc
28
INPUTS
OUTPUTS
OE
Dn
H
X
L
L
L
H
L
X
18
17
16
19
Vcc
10k
10k
10k
10k
10k
10k
Level Shift
Level Shift
Level Shift
Level Shift
10k
10k
10k
Vcc
10k
10k
10k
12
10
11
13
I/O
Function
O
Non inverted output of CH4
O
Inverted output of CH4
O
Non inverted output of CH3
O
Inverted output of CH3
-
Vcc for CH3/4 power block
I
Input for Ch4 stand by control
-
Substrate ground
O
Output for CH3 OP-AMP
I
Inverting input for CH3 OP-AMP
I
Non inverting input for CH3 OP-AMP
O
Output for CH4 OP-AMP
I
Inverting input for CH4 OP-AMP
I
Non inverting input for CH4 OP-AMP
-
Vcc for pre block
Qn
Z
L
H
Q0
15
10k
10k
10k
10k
14
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