Rear Panel I/O Connectors; Development Kit Pcie Configuration; Development Kit Default Header Configuration; Processor E3-1125C With Intel - Intel Xeon E3-1125C User Manual

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Table 10. Intel Xeon

Development Kit PCIe Configuration

Header
J6E2
J3F2
Keep EP in Reset
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Figure 4. Intel Xeon
Development Kit PCIe Headers
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Table 11. Intel Xeon

Development Kit Default Header Configuration

SKU
#1 Closed
#2 Closed
#3 Closed
#4 Open
1.13

Rear Panel I/O Connectors

Table 12.

Rear Panel I/O Connectors

Ref Des Location
J8A1
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Intel Xeon

Processor E3-1125C with Intel

User Guide
16
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Processor E3-1125C with Intel
J6E2 must be Open for the PCH with BIOS V35 or later.
Jumper must be Closed (inserted).
Removing the jumper (Open) will keep EP in Reset (Low-true signal forced Low).
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Processor E3-1125C with Intel
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Processor E3-1125C with Intel
J6F6 J6E4 J6E2
Closed Open
Closed Open
Open Open
Open Open
USB Ports 0-3
Connector
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Communications Chipset 8910 Development Kit
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Communications Chipset 8910

Description
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Communications Chipset 8910
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Communications Chipset 8910
J3F2 J6E5 J6E6
Closed Closed X
Closed Closed X
Closed Closed X
Closed Closed X
Description
The rear panel connector provides a quad-stacked USB
2.0 ports. Additionally, on board there is a header to
allow connection to a front panel header. There are three
USB modes:
• RMH
• UHCI
• EHCI
Crystal Forest—Introduction
Description
Bifur = X4 (0,0), Lane Reverse
Bifur = X4 (0,0), Lane Reverse
Bifur = X8 & X8 (1,0), Lane
Reverse
Bifur = X16 (1,1), Lane Reverse
continued...
October 2012
Order No.: 328009-001US