Co�nter Va��e
CCRP
CCRA
TnON
TnPAU
TnPOL
CCRA Int.
F�ag TnAF
CCRP Int.
F�ag TnPF
TM O/P Pin
(TnOC=1)
TM O/P Pin
(TnOC=0)
PWM D�t� C�c�e
set b� CCRA
Note: 1. Here TnDPX=0 -- Counter cleared by CCRP
2. A counter clear sets the PWM Period
3. The internal PWM function continues running even when TnIO [1:0]=00 or 01
4. The TnCCLR bit has no influence on PWM operation
Rev. 2.10
HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
HT68FU30/HT68FU40/HT68FU50/HT68FU60
Enhanced I/O Flash Type 8-Bit MCU with EEPROM
Co�nter c�eared
b� CCRP
Pa�se Res�me
PWM Period
set b� CCRP
PWM Mode -- TnDPX=0
136
TnDPX = 0; TnM [1:0] = 10
Co�nter Reset when
TnON ret�rns high
Co�nter Stop if
TnON bit �ow
PWM res�mes
operation
O�tp�t contro��ed b�
O�tp�t Inverts
other pin-shared f�nction
when TnPOL = 1
���� 02� 201�
Time
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