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HOLTEK HT66FM5440 manual available for free PDF download: Manual
HOLTEK HT66FM5440 Manual (218 pages)
Brushless DC Motor A/D Flash MCU
Brand:
HOLTEK
| Category:
Engine
| Size: 5 MB
Table of Contents
Table of Contents
2
Capt�Re Timer Register Description
4
Str�Ct
5
Features
7
CPU Feat�Res
7
General Description
8
Block Diagram
9
Pin Assignment
9
Pin Description
10
Absolute Maximum Ratings
13
D.C. Characteristics
13
Characteristics
14
LVR/LVD Electrical Characteristics
14
A/D Converter Electrical Characteristics
15
D/A Converter Electrical Characteristics
16
Operational Amplifier 0 Electrical Characteristics
16
Operational Amplifier 1 & 2 Electrical Characteristics
17
Unit Gain Buffer Electrical Characteristics
17
Comparators Electrical Characteristics
18
Power-On Reset Characteristics
18
System Architecture
19
Clocking and Pipelining
19
Program Co�Nter
19
Stack
20
Arithmetic and Logic Unit - ALU
21
Flash Program Memory
22
Special Vectors
22
Look-�P Table
22
In Circ�It Programming - ICP
24
On-Chip Deb�G S�Pport - OCDS
25
Data Memory
25
Data Memory Addressing
26
General P�Rpose Data Memory
26
Special P�Rpose Data Memory
26
Special Function Register Description
28
Indirect Addressing Registers - IAR0� IAR1� IAR
28
Memory Pointers - MP0� MP1L� MP1H� MP�L� MP�H
28
Acc�M�Lator - ACC
29
Program Co�Nter Low Register - PCL
30
Look-�P Table Registers - TBLP� TBHP� TBLH
30
Stat�S Register - STATUS
30
Oscillators
32
Oscillator Overview
32
System Clock Configurations
32
Internal High Speed RC Oscillator - HIRC
33
Internal 3�Khz Oscillator - LIRC
33
Operating Modes and System Clocks
33
System Clocks
33
System Operation Modes
34
Control Registers
35
Operating Mode Switching
37
Standby C�Rrent Considerations
38
Wake-�P
39
Watchdog Timer
40
Watchdog Timer Clock So�Rce
40
Watchdog Timer Control Register
40
Watchdog Timer Operation
41
Reset and Initialisation
42
Reset F�Nctions
42
Reset Initial Conditions
44
Input/Output Ports
51
P�Ll-High Resistors
52
Port a Wake-�P
52
I/O Port Control Registers
53
Pin-Shared F�Nctions
53
I/O Pin Str�Ct�Res
60
Programming Considerations
60
Timer Modules - TM
61
Introd�Ction
61
TM Operation
61
TM Clock So�Rce
61
TM External Pins
62
Programming Considerations
63
Periodic Type TM - PTM
64
Periodic TM Operation
65
Periodic Type TM Register Description
66
Periodic Type TM Operating Modes
72
Capture Timer Module - CAPTM
84
Capt�Re Timer Overview
84
Noise Filter
89
Analog to Digital Converter
91
A/D Converter Overview
91
A/D Converter Register Description
92
A/D Converter Operation
101
S�Mmary of A/D Conversion Steps
103
Considerations for Sim�Tanio�Sly �Sing both Trigger Methods
105
Programming Considerations
106
A/D Conversion F�Nction
106
A/D Conversion Programming Examples
107
Comparators
109
Comparator Operation
109
Comparator Register
110
Over Current Detection
111
Over C�Rrent Detect F�Nctional Description
111
Phase Current Detection
113
Phase C�Rrent Detect F�Nctional Description
113
Phase C�Rrent Detect Register
113
BLDC Motor Control Circuit
114
F�Nctional Description
114
PWM Co�Nter Control Circ�It
115
Mask F�Nction
119
Hall Sensor Decoder
133
Motor Protection F�Nction
133
I 2 C Interface
140
C Interface Operation
140
I C Registers
141
I � C B�S Comm�Nication
144
I � C B�S Start Signal
145
C Slave Address
145
I � C B�S Read/Write Signal
145
I � C B�S Slave Address Acknowledge Signal
146
I � C B�S Data and Acknowledge Signal
146
I � C Time-O�T Control
147
UART Interface
149
UART External Pins
150
UART Data Transfer Scheme
150
UART Stat�S and Control Registers
150
Ba�D Rate Generator
156
UART Set�P and Control
156
UART Transmitter
158
UART Receiver
159
Managing Receiver Errors
160
UART Interr�Pt Str�Ct�Re
161
UART Power down and Wake-�P
162
Low Voltage Detector - LVD
163
LVD Register
163
LVD Operation
164
Multiplication Division Unit - MDU
165
MDU Registers
166
MDU Operation
167
Interrupts
169
Interr�Pt Registers
169
Interrupt Priority Configuration
178
Interr�Pt Operation
181
Hall Sensor Interr�Pts
184
External Interr
184
Comparator Interr
185
CAPTM Interr�Pts
185
PWM Mod�Le Interr�Pts
186
Time Base Interr�Pt
189
LVD Interr
189
Interr�Pt Wake-�P F�Nction
190
Programming Considerations
190
Application Circuits
191
Introd�Ction
191
F�Nctional Description
191
Hardware Block Diagram
192
Hardware Circ�It
193
Instruction Set
194
Introd�Ction
194
Instr�Ction Timing
194
Moving and Transferring Data
194
Arithmetic Operations
194
Logical and Rotate Operation
195
Branches and Control Transfer
195
Bit Operations
195
Other Operations
195
Instruction Set Summary
196
Extended Instr�Ction Set
198
Instruction Definition
200
Extended Instruction Definition
209
Package Information
216
Pin SSOP (150Mil) O�Tline Dimensions
217
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