CDCLVP111-SP EVM Description
The final termination option is to allow single-ended input to drive CLK1. A 0-Ω resistor, R3, can be added
to the circuit to connect VBB output to the negative pin of CLK1. Remove resistor R2 and R4. A single-
ended signal can now drive CLK1 input on J7.
3.3
CDCLVP111-SP EVM Output Termination
The CDCLVP111-SP EVM is configured with no on-board output termination installed, by default. This
allows simple connection to 50-Ω terminated test equipment. There are 0402 pads for 50-Ω termination on
board. This allows the connection of a high- impedance or differential probe. Simply install the pair of
resistors associated with the output being evaluated. In
termination. Leave them unconnected for direct termination to 50-Ω test equipment.
6
CDCLVP111-SP Evaluation Module (CDCLVP111EVM-CVAL)
Figure 5. LVDS Termination
Figure 6. On Board Optional Output Termination
Copyright © 2016, Texas Instruments Incorporated
Figure
6, install R7 and R12 for on-board
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SCAU055 – November 2016
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