Digital Tube pin assignment:
Signal Name
DIG[0]
DIG[1]
DIG[2]
DIG[3]
DIG[4]
DIG[5]
DIG[6]
DIG[7]
SEL[0]
SEL[1]
SEL[2]
SEL[3]
SEL[4]
SEL[5]
16. BUZZER
The buzzer is controlled by a triode. When it is low, the triode is turned on and the buzzer
sounds. When it is high, the triode is turned off and the buzzer does not ring. For the sake of
convenience, we are between the buzzer and the FPGA. A jump cap (CB1) is added. If you
hate the buzzer, you can remove the jump cap. The schematic diagram is shown in Figure
16-1.
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Pin
R14
N16
P16
T15
P15
N12
N15
R16
M11
P11
N11
M10
P9
N9
Figure16-1
AX301 User Manual
Explain
A
B
C
D
E
F
G
DP
Digital Tube 1
Digital Tube 2
Digital Tube 3
Digital Tube 4
Digital Tube 5
Digital Tube 6
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