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8.3.11 Alarm Feature
The devices have an active-high ALARM output on pin 35. The ALARM signal is synchronous and changes its
state on the 16th falling edge of the SCLK signal. A high level on ALARM indicates that the alarm flag has
tripped on one or more channels of the device. This pin can be wired to interrupt the host input. When an
ALARM interrupt is received, the alarm flag registers are read to determine which channels have an alarm. The
devices feature independently-programmable alarms for each channel. There are two alarms per channel (a low
and a high alarm) and each alarm threshold has a separate hysteresis setting.
The ADS8674 and ADS8678 set a high alarm when the digital output for a particular channel exceeds the high
alarm upper limit [high alarm threshold (T) + hysteresis (H)]. The alarm resets when the digital output for the
channel is less than or equal to the high alarm lower limit (high alarm T – H – 2). This function is shown in
Figure
86.
Similarly, the lower alarm is triggered when the digital output for a particular channel falls below the low alarm
lower limit (low alarm threshold T – H – 1). The alarm resets when the digital output for the channel is greater
than or equal to the low alarm higher limit (low alarm T + H + 1). This function is shown in
H_ALARM On
H_ALARM Off
(T ± H ± 2) (T + H)
Figure 86. High-ALARM Hysteresis
Figure 88
shows a functional block diagram for a single-channel alarm. There are two flags for each high and low
alarm: active alarm flag and tripped alarm flag; see the
details. The active alarm flag is triggered when an alarm condition is encountered for a particular channel; the
active alarm flag resets when the alarm shuts off. A tripped alarm flag sets an alarm condition in the same
manner as for an active alarm flag. However, the tripped alarm flag remains latched and resets only when the
appropriate alarm flag register is read.
Alarm Threshold
Hysteresis Channel n
ADC
Copyright © 2015, Texas Instruments Incorporated
ADC Output
Channel n
+/-
+
ADC Output
th
16
Channel n
SCLK
Figure 88. Alarm Functionality Schematic
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L_ALARM On
L_ALARM Off
(T ± H ± 1)
Figure 87. Low-ALARM Hysteresis
Alarm Flag Registers (Read-Only)
Active Alarm Flag
Channel n
Tripped Alarm Flag
S
Q
Channel n
R
Q
Alarm Flag Read
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ADS8674 ADS8678
ADS8674, ADS8678
SBAS627 – JULY 2015
Figure
87.
(T + H + 1)
ADC Output
section for more
ALARM
SDO
35
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