Texas Instruments ADS867 Series Manual page 29

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The initial accuracy specification for the internal reference can be degraded if the die is exposed to any
mechanical or thermal stress. Heating the device when being soldered to a PCB and any subsequent solder
reflow is a primary cause for shifts in the V
stress and therefore is a function of the package, die-attach material, and molding compound, as well as the
layout of the device itself.
In order to illustrate this effect, 80 devices were soldered using lead-free solder paste with the manufacturer's
suggested reflow profile, as explained in application report SNOA550. The internal voltage reference output is
measured before and after the reflow process and the typical shift in value is shown in
tested units exhibit a positive shift in their output voltages, negative shifts are also possible. Note that the
histogram in Figure 75 shows the typical shift for exposure to a single reflow profile. Exposure to multiple reflows,
which is common on PCBs with surface-mount components on both sides, causes additional shifts in the output
voltage. If the PCB is to be exposed to multiple reflows, solder the ADS8674 and ADS8678 in the second pass to
minimize device exposure to thermal stress.
The internal reference is also temperature compensated to provide excellent temperature drift over an extended
industrial temperature range of –40°C to 125°C.
across temperature for different values of the AVDD supply voltage. The typical specified value of the reference
voltage drift over temperature is 8 ppm/°C
20 ppm/°C.
4.1
4.099
4.098
4.097
4.096
4.095
4.094
4.093
4.092
4.091
4.09
±40 ±7
Free-Air Temperature (
Figure 76. Variation of the Internal Reference Output
(REFIO) Across Supply and Temperature
Copyright © 2015, Texas Instruments Incorporated
value. The main cause of thermal hysteresis is a change in die
REF
30
25
20
15
10
5
0
-4 -3
Error in REFIO Voltage (mV)
Figure 75. Solder Heat Shift Distribution Histogram
Figure 76
(Figure
----- AVDD = 5.25 V
------ AVDD = 5 V
------ AVDD = 4.75 V
26 59 92 125
o
C)
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-2 -1 0
shows the variation of the internal reference voltage
77) and the maximum specified temperature drift is equal to
20
16
12
8
4
0
1 2
AVDD = 5 V, number of devices = 30, ΔT = –40°C to 125°C
Figure 77. Internal Reference Temperature Drift Histogram
ADS8674 ADS8678
ADS8674, ADS8678
SBAS627 – JULY 2015
Figure 75. Although all
1
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3 4 5 6 7 8 9
REFIO Drift (ppm/ºC)
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