Lenovo ThinkSystem SR950 Setup Manual page 65

• At least one DIMM is required for each processor. Install at least six DIMMs per processor for good
performance.
• An "M" SKU processor is required for processors with more than six 128GB DIMMs installed.
• Within a memory controller:
– Populate channel A/D first. Channel B/E will be either empty or must be identically populated as
channel A/D. Channel C/F will be either empty or must be identically populated as channel B/E.
Note: Five DIMM configurations is a supported exception to these population rules. Five DIMMs are
populated so channels 0 and 1 each have two DIMMs and channel 2 has one DIMM.
– Populate the memory connector in each channel that is physically furthest from the processor (slot 0)
first.
– If a memory channel has two DIMMs installed and these DIMMs have different numbers of ranks,
populate the DIMM with higher number of ranks in the memory connector that is physically furthest
from the processor (slot 0).
– If two DIMMs on a channel have identical ranks, populate the DIMM with higher capacity in the memory
connector that is physically furthest from the processor (slot 0).
Populating memory modules for best system performance
To populate memory configurations for the best memory performance, observe the following general
guidelines for all memory modes.
Note: The following guidelines discuss the memory architecture related to system board processor 1. For
system board processor 2, substitute memory channels G/H/J/K/L/M for processor 1 memory channels A/B/
C/D/E/F in the discussion.
• When multiple processors are installed, all processors within the server must have identical memory
population.
• Populate all memory channels for optimal performance.
• If a processor has only three DIMMs that are identical (same Lenovo part number), populate all of them in
memory controller 1 (IMC1).
Additional requirements for memory mirroring
The following rules apply for memory mirroring.
Note: The following guidelines discuss the memory architecture related to system board processor 1. For
system board processor 2, substitute memory channels G/H/J/K/L/M for processor 1 memory channels A/B/
C/D/E/F in the discussion.
• The server supports only two, three, four, or six DIMMs per memory controller (one or five DIMMs per
memory controller is not supported).
• As with independent memory mode, equal DIMM sizes must be installed for the populated memory
channels. DIMM slot population within a channel does not have to be identical; however, the same DIMM
slot locations across channel A/B/C or channels D/E/F must be populated identically.
• If DIMMs are installed in only two memory channels, mirroring occurs across two DIMMs. Channels A/D
and B/E hold the primary and secondary cache lines.
• If DIMMs are installed in all three memory channels, mirroring occurs across all three DIMM channels.
Channels A/D and B/E, Channels B/E and C/F, and Channels C/F and A/D hold the primary and secondary
cache lines.
• Do not mix 2-channel and 3-channel DDR mirroring in a memory controller.
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Chapter 3 Server hardware setup
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