Spectrum Digital XDS560R Installation Manual page 22

Distributor of Spectrum Digital Inc: Excellent Integrated System Limited
Datasheet of 702570 - TARGET ADAPTER CBL 20P CTI JTAG
Contact us: sales@integrated-circuit.com Website: www.integrated-circuit.com
Table 1: 14/20-Pin Header Signal Description
Pin # Signal
1 TMS JTAG test mode select.
3 TDI JTAG test data input.
4,8, GND
10,12
7 TDO JTAG test data output.
11 TCK JTAG test clock. TCK is a 12-MHz clock
source from the emulation pod. This signal
can be used to drive the system test clock.
2 TRST- JTAG test reset.
13 EMU0 Emulation pin 0.
14 EMU1 Emulation pin 1.
Presence detect. Indicates that the
5 PD emulation cable is connected and that the
target is powered up. PD should be tied to
the target processor's I/O pins Vcc.
JTAG test clock return. Test clock input to
9 TCK_RET the emulator. May be a buffered or unbuf-
fered version of TCK.
15 SRST * ARM style target reset
16 GND
17 EMU2 * Emulation pin 2.
18 EMU3 * Emulation pin 3.
19 EMU4 * Emulation pin 4.
20 GND
* Reserved for future emulation software support
Description
Spectrum Digital, Inc
Emulator Target
State State
Output Input
Output Input
Input Output
Output Input
Output Input
I/O I/O
I/O I/O
Input Output
Input Output
I/O Open
drain
I/O I/O
I/O I/O
I/O I/O
3-3