System Configuration; Ic Configuration - Sony SS-HQ1 Application Notes

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2. System Configuration

2.1. IC Configuration

The SS-HQ1 is the digital signal processing system for single CCD color camera.
The main LSIs are shown in Table 2.1-1.
Main LSIs
Type name
DSP
CXD3172AR
CDS/AGC
CXA2096N
*Please refer to the specification of each LSI about detail.
The peripheral ICs shown in Table 2.1-2 are needed to configurate the system in addition to the
above-mentioned 2LSIs.
Peripheral IC
EEPROM
RS-232C
Transceiver
(Maxim integrated Products, Inc.)
System Reset
(MITSUMI ELECTRIC CO.,LTD)
Table 2.1-1 Main LSIs
1. Luminance and Chroma signal processing
2. Built-in digital encoder
3. Built-in microcontroller with AE/AWB
4. Built-in AE/AWB integral circuit
5. Built-in external synchronization function
6. Built-in 10bit A/D converter
7. Built-in 10bit D/A converter (Y/C 2ch)
8. Built-in PLL
9. Built-in Burst Separator and Sync Separator
10. Built-in EVR3ch
11. Built-in timing generator
12. Built-in vertical driver
13. Built-in serial communication circuit that supports
RS-232C and microcomputer communication
14. Built-in ITU REC656 conformity digital output function
15. Built-in ITU REC601 conformity digital output function
1. Correlated double sampling (CDS)
2. Built-in AGC circuit
3. Built-in interface circuit for A/D converter
Table 2.1-2 Peripheral ICs
Type name (Brand name)
AK6480AF
(AKM)
or
BR9080AF-W
(ROHM)
MAX3232CSE (Considerable)
PST9127N (Considerable)
Outline
Description
8kbit EEPROM
(Note that other substitutions are
not possible due to limitations in
the communication format.)
PC control I/F
External u-Com I/F
Vth 2.7V
3
- SS-HQ1 Application Notes -
Ver.1.0.0 January 7, 2005
Package
LQFP
100 pin
SSOP
24 pin
Package
SSOP
8pin
SO
16pin
SOT-25
5pin

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