Sony SS-HQ1 Application Notes page 203

Internal phase comparison
The CXD3172AR internally compares the phases of the external power supply square wave signal (S0 pin 44
input), and the VD (MCK-VD) signal obtained by frequency-dividing the MCK (pin 43). The phase comparison
result is output through PCOMP (pin 42).
The PCOMP signal is applied to LPF (V-PLL) and fed back to the MCK VCO circuit to form the vertical
direction PLL. The PCOMP signal's polarity can be switched through PCMPINV (CAT7_Byte2_bit4).
In addition, it is possible to select either active filter or passive filter in accordance with the external LPF
specifications. However, active filter is recommended since it provides higher performance.
Fig 12.2-6 shows the PCOMP output waveform when a lock is applied. Fig 12.2-7 shows the PCOMP output
waveform without a lock. (From measurements using our evaluation board.) Apply a trigger to the external
power supply square wave (S0 pin 44 input) and view the PCOMP output waveform to check whether a lock
has been applied.
Ch1
Ch2
Ch1:2.00V / DIV
Ch2:1.00V / DIV
Ch1
Ch2
Ch1:2.00V / DIV
Ch2:1.00V / DIV
[TRIGGER]
4.00ms / DIV
Fig 12.2-6 PCOMP output waveform (locked)
[TRIGGER]
PCOMP Waveforms Instability
4.00ms / DIV
Fig 12.2-7 PCOMP output waveform (unlocked)
S0 input
3.3 V amplitude
digital signal
PCOMP
output
S0 input
3.3 V amplitude
digital signal
PCOMP
output
197
- SS-HQ1 Application Notes -
Ver.1.0.0 January 7, 2005