Evr Connection; Integrated Evr And Reserved Channels (Agc Control) - Sony SS-HQ1 Application Notes

3.5. EVR Connection

3.5.1. Integrated EVR and Reserved Channels (AGC control)

The CXD3172AR is equipped with a 3-channel, 8-bit D/A converter (EVR).
It can produce nearly linear voltage up to approximately 0V-3.3V.
ch Pin
EVR0 63 AGCCNT
EVR1 64 IRISVCNT
EVR2 66 EVR2CNT
We recommend connecting EVR0 (Pin 63) to AGCCONT (Pin 14) of the CXA2096N unless an external
microcomputer or other means is used for AGC because AGC of the CXA2096N is performed by the
CXD3172AR firmware. EVR0 output can be controlled on a per-field basis.
EVR1 and EVR2 (Pins 64 and 66, respectively) are not controlled by the firmware.
The output value of the integrated EVR is as follows. (This is a reference value.)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
Table 3.5-1 System Configuration of Integrated EVR
Parameter
CAT8_Byte3_bit0-7
CAT8_Byte4_bit0-7
CAT8_Byte5_bit0-7
VDD=3.3V
20 40 60
EVR data(HEX)
Fig 3.5-1 Measured EVR Output Value (Reference Value)
Control details
AGC gain control
Control parameter value of EVR1
Control parameter value of EVR2
80 A0 C0
16
- SS-HQ1 Application Notes -
Ver.1.0.0 January 7, 2005
Control method
Field-controlled
User-adjusted
User-adjusted
User-adjusted
E0