QDI SynactiX 5EP Manual page 28

Introduction
Onboard LAN(optional)
The ICH2's integrated LAN Controller includes a 32-bit PCI controller that provides en-
hanced scatter-gather bus mastering capabilities and enables the LAN Controller to per-
form high speed data transfers over the PCI bus. Its bus master capabilities enable the
component to process high level commands and perform multiple operations, which low-
ers CPU utilization by off-loading communication tasks from the CPU. Two large transmit
and receive FIFOs of 3 Kbyte each help prevent data underruns and overruns while
waiting for bus accesses. This enables the integrated LAN Controller to transmit data with
minimum interframe spacing(IFS).
The integrated LAN Controller also includes an EEPROM. The EEPROM provides power-on
initialization for hardware and software configuration parameters.
Manual for SynactiX 5EP/5EI