QDI SynactiX 5EP Manual page 27

For Windows 98 SE and Windows 2000, just install them directly.
4. Three ways to enter Suspend-to-RAM status under ACPI-enabled Windows 98 or
Windows 2000:
Click Start -> Shut down -> Standby to enable the system to enter Suspend-to-
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RAM status.
Click Start -> Setup -> Control Panel -> Power Management -> Advanced and
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choose Standby item, the system will enter Suspend-to-RAM status when you
press power button.
From Power Management Properties in Control Panel, set the latency time in
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System Standby, the system will enter Suspend-to-RAM status when time out.
The same ways used to power up the system can be used to wake up the system from
Suspend-to-RAM status. For example, pushing the power button, through the Wake-on-
LAN, Wake-on-Modem function or RTC Alarm. If the keyboard password power-on func-
tion is enabled, the keyboard password should be used to wake up the system instead of
pushing the power button.
Ultra ATA/100
According to the previous ATA/IDE hard drive data transfer protocol, the signaling way to
send data was in synchronous strobe mode by using the rising edge of the strobe signal.
The Ultra ATA/33 protocol doubles the burst transfer rate from 16.6MB/s to 33.3MB/s, by
using both the rising and falling edges of the strobe signal, and Ultra ATA/66 doubles the
Ultra ATA burst transfer rate once again (from 33.3MB/s to 66.6MB/s) by reducing setup
times and increasing the strobe rate. In the same way, the burst transfer rate of Ultra
ATA/100 is 50% higher than ATA/66(from 66.6MB/s to 100MB/s) by reducing the pulse
width from 30ns to 20ns and increasing the strobe rate. When the ATA_FAST bit is set for
any of the 4 IDE devices, then the timings for the transfers to and from the corresponding
device run at a higher rate. The ICH2 Ultra ATA/100 logic can achieve read transfer rates
up to 100MB/s, and write transfer rates up to 88.9MB/s. The cable improvements required
for Ultra ATA/66 are sufficient for Ultra ATA/100, so no further cable improvements are
required when implementing Ultra ATA/100. The faster strobe rate increases EMI, which
cannot be eliminated by the standard 40-pin cable used by ATA and Ultra ATA. To eliminate
this increase in EMI, a new 40-pin, 80-conductor cable is needed. This cable adds 40
additional ground lines between each of the original 40 ground and signal lines. The
additional 40 lines help shield the signal from EMI, reduce crosstalk and improve signal
integrity.
Ultra ATA/33 introduced CRC (Cyclical Redundancy Check), a new feature of IDE that
provides data integrity and reliability. Ultra ATA100/66 uses the same process. The CRC
value is calculated by both the host and the hard drive. After the host-request data is sent,
the host sends its CRC to the hard drive, and the hard drive compares it to its own CRC
value. If the hard drive reports errors to the host, then the host retries the command
containing the CRC error.
Manual for SynactiX 5EP/5EI
Chapter 1