GE LPS-D Instruction Manual page 352

B.1 MEMORY MAPPING
Table B–4: MODBUS MEMORY MAP: SETPOINTS
Register DDE Item Name
Address (Mnemonic)
R43752I G2_NCAIN1
R43753I G2_NCAIN2
B
R43754I G2_NCAIN3
R43755I G2_NCAIN4
R43756I G2_NCAIN5
R43757I G2_NCAIN6
R43758I G2_NCAIN7
R43759I G2_NCAIN8
R43760I G2_T1
R43761I G2_T2
R43762I G2_T3
R43763I G2_T4
R43764I G2_T5
R43765I G2_T6
R43766I G2_A1
R43767I G2_A2
R43768I G2_A3
R43769I G2_A4
R43770I G2_A5
R43771I G2_A6
R43772I G2_A7
R43773I G2_A8
R43774I G2_A9
R43775I G2_A10
R43776I G2_A11
R43777I G2_A12
R43778I G2_C1
R43779I G2_C2
R43780I G2_KT1
R43781I G2_KT2
R43782I G2_KT3
R43783I G2_KT4
R43784I G2_CONFTRIP
R43785I G2_CONFOSC
R43800I G3_Z1PHASE
R43801F G3_Z1PHREACH
R43803F G3_Z1PLEVDET
B-
18
(Sheet 14 of 27)
Contents Units/Value/Range
NCAIN1 0 to 256 step 1 (depending on
choice of input assignment)
NCAIN2 0 to 256 step 1
NCAIN3 0 to 256 step 1
NCAIN4 0 to 256 step 1
NCAIN5 0 to 256 step 1
NCAIN6 0 to 256 step 1
NCAIN7 0 to 256 step 1
NCAIN8 0 to 256 step 1
T1 0 to 256 step 1
T2 0 to 256 step 1
T3 0 to 256 step 1
T4 0 to 256 step 1
T5 0 to 256 step 1
T6 0 to 256 step 1
A1 0 to 256 step 1
A2 0 to 256 step 1
A3 0 to 256 step 1
A4 0 to 256 step 1
A5 0 to 256 step 1
A6 0 to 256 step 1
A7 0 to 256 step 1
A8 0 to 256 step 1
A9 0 to 256 step 1
A10 0 to 256 step 1
A11 0 to 256 step 1
A12 0 to 256 step 1
C1 0 to 256 step 1
C2 0 to 256 step 1
KT1 0 to 256 step 1
KT2 0 to 256 step 1
KT3 0 to 256 step 1
KT4 0 to 256 step 1
CONFTRIP 0 to 256 step 1
CONFOSC 0 to 256 step 1
Z1PHASE 0 = No; 1 = Yes
0.01 to 50.0 Ω step 0.01 (5A)
Z1PHREACH
0.05 to 250.0 Ω step 0.05 (1A)
Z1PLEVDET 0.0 to 9.9 p.u. V step 0.1
LPS-D Line Protection System
APPENDIX B
R/W Format
Code
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W INT
R/W Float
R/W Float
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