ICS ELECTRONICS 4863 Manual page 16

1.6 DIGITAL SIGNAL SPECIFICATIONS
The 4863/2363's Digital I/O signals have the following specifications:
1.6.1 Data Lines
Number
Input
Levels
Output
Levels
1.6.2 Data Input
Data may be read after receipt of an External Data Ready signal (EDR) if
Talk handshaking is enabled or anytime if Talk handshaking is disabled.
Inhibit responds < 0.1 µsec after EDR edge. Figure 1-1 shows data loading
and GPIB bus output times for 6 HEX characters. Active EDR edge and
Inhibit signal polarities are selected by configuration commands. The EDR
F/F is reset when the data is read, or by the SENSE:RESET:EDR command
or by a Device Clear. Standard units only use EDR #1 input. Both EDR
inputs have 33 Kohm pullups to + 5 Vdc. Times are listed in Table 1-2.
EDR
Input
Inhibit
Output
1.6.3 Output Data and Data Strobe
Data may be placed in the output latches by a port command or by string
commands. A strobe pulse is automatically generated after data is placed in
the output latches by a data string or in response to a STRobe command as
shown in Figure 1-2. Times are listed in Table 1-2. Strobe signal levels same
as the output levels in paragraph 1.6.1.
48 with internal 33 Kohm pullups to + 5 Vdc
High >=2.4 Vdc or open circuit
Low < 0.5 Vdc at 200 µA
High > 3.0 Vdc with 3 mA source
> 2.0 Vdc with 24 mA source
Low < 0.55 Vdc with 48 mA sink
High >=2.4 Vdc or open circuit
< 0.5 Vdc at 200 µA
Low
High > 2.4 Vdc with 4 mA source
Low < 0.55 Vdc with 16 mA sink
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