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16.4.5
Counter Value
The counter data can be read out from CNT_DATA[15:0]/T16P_CNT_DATA register at any time.
Counter data can also be written to CNT_DATA[15:0]. This makes it possible to change the interrupt and/or timer
output cycles temporarily.
16.4.6
Timing Charts
Normal mode
Count clock
PRESET
PRUN
Compare data load
Compare A register
Compare B register
Counter
A match signal
B match signal
PWM_H output (INITOL = 0)
PWM_L output (INITOL = 0)
PWM_H output (INITOL = 1)
PWM_L output (INITOL = 1)
Buffer empty interrupt
A match interrupt
B match interrupt
Normal + fine mode
Count clock (PCLK1)
PRESET
PRUN
Compare data load
Compare A register
Compare B register
Counter
A match signal
B match signal
PWM_H output (INITOL = 0)
PWM_L output (INITOL = 0)
PWM_H output (INITOL = 1)
PWM_L output (INITOL = 1)
Buffer empty interrupt
A match interrupt
B match interrupt
Figure 16.
S1C33L26 TECHNICAL MANUAL
(When BCNT[3:0] = 1)
0
0
0
1 2 3 4 5 0
Figure 16.
4.6.1 PWM Output Timing Chart 1 (normal mode)
(When BCNT[3:0] = 1)
0
0
0
1 2 3 4 5 0
4.6.2 PWM Output Timing Chart 2 (normal + fine mode)
Seiko Epson Corporation
16 16-BIT AUDIO PWM TIMER (T16P)
3
5
1 2 3 4 5 0 1 2 3 4 5 0 1
3
5
1 2 3 4 5 0 1 2 3 4 5 0 1
4
5
2 3 4 5 0 1
4
5
2 3 4 5 0 1
16-7
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