Juniper LN2600 Manual page 61

Copyright © 2018, Juniper Networks, Inc.
Power on the dedicated customer site circuit breakers.
8.
Monitor router startup on the console and the LED on the front panel of the LN2600
9.
router to verify that the router is booting properly. For information on the LN2600
router status LED, see "LN2600 Router Status LED" on page
As a standard part of the boot process, the router runs startup power-on self test (SPOST)
and then power-on self test (POST) diagnostics.
A successful startup looks similar to the following example:
CPU Memory (Data32: 00000000-0007ffff) test completed, 1 pass, 0 errors
CPU Memory (Data32: 0f000000-0fffffff) test completed, 1 pass, 0 errors
CPU Memory (Addr32: 00000000-0007ffff) test completed, 1 pass, 0 errors
CPU Memory (Addr32: 0f000000-0fffffff) test completed, 1 pass, 0 errors
Boot Flash: 16 MB in 131 Sectors (portwidth: 16bit
OCTEON CN56XX pass 2.1, Core clock: 600 MHz, DDR clock: 266 MHz
Initializing USB
Device 1:
Product DOTG Root Hub
Initializing IDE
Initializing FPGA
Programming /cf/usr/share/pfe/firmware/563-029572.bit: 2067591 bytes
Programmed successfully (time: 883966125 ticks)
PCIe: Waiting for port 0 link
PCIe: Port 0 link active, 1 lanes
0:00:00.0 0x003b1304
HWA FPGA Version 0x0011081200000055
PCIe: Waiting for port 1 link
PCIe: Port 1 link active, 4 lanes
1:00:00.0 0x0009184e
IDP Revision Date-Time: 05/28/08-18:00:00
Juniper LN2600 revision 1.3, Serial# 1R263360016*
Juniper Part # 650-046793
Bootstrap: #1.6
Loader: #2.3 12.1X45-D10 2013-07-04 05:03:05 UTC
builder@briath.juniper.net
IPMC: 1.0.19
IPMC_RB: 1.0.19
SDRAM: 2048 MB
Chapter 9: Connecting the Router to Power
8.
chipwidth: 16bit)
47