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Standard Status Registers
The Event Status registers are mandatory in all instruments that fulfill the IEEE 488.2
standard. They are structured as shown in Figure 4B-13, and an overview of the status
bits is shown in Figure 4B-14.
Standard Event
Status Register
* ESR?
* ESE <NRf
* ESE?
Figure 4B-13. Structural Overview of the Status Event Register
Figure 4B-14. Bits in the Standard Event Status Register
PON URQ CME EXE DDE QYE RQC OPC
7
6
5 4 3 2
Standard Event Status Enable
>
Logical OR
Output Queue not empty
RQS
Service
7
6
Request
ESB
MAV
Generation
MSS
SRQ
signal
Service Request Enable
Logical OR
SCPI and IEEE Bus Descriptions
1
0
Output
Queue
Statu s Byte
Register
1
3 2
1
0
<. . . r ead by * STB?
*
SRE <NRf >
* SRE?
Status Reporting System
ead114f.eps
ead115f.eps
4B
4B-21
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