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(2)
V
is used for the ADC reference. Its effective value is determined through indirect measurement using the ADC and measuring
(REF1)
the differential voltage on VC1 - VC0.
(3)
V
is used for the LDO, coulomb counter, and current measurement
(REF2)
(4)
Specified by characterization
7.15 Coulomb Counter
Typical values stated where T
to 80 V (unless otherwise noted)
PARAMETER
Input voltage range
V
(CC_IN)
for measurements
Input voltage range
V
(CC_IN)
for measurements
B
Integral nonlinearity
(CC_INL)
Differential
B
(CC_DNL)
nonlinearity
V
Offset error
(CC_OFF)
V
Offset error drift
(CC_OFF_DRIFT)
(3)
B
Gain
(CC_GAIN)
Effective input
R
(CC_IN)
resistance
(1)
Operation with V
up to 80 V is supported when the charge pump is not in operation. Whenever the charge pump is in operation (in
BAT
5.5 V or 11 V mode), the maximum voltage on V
their maximum specified voltage.
(2)
1 LSB (16-bit mode, using CC1 filter) = V
(3)
Specified by characterization
(4)
Specified by design
7.16 Coulomb Counter Digital Filter (CC1)
Typical values stated where T
to 80 V (unless otherwise noted)
PARAMETER
t
Conversion-time
(CC1_CONV_FAST)
t
Conversion-time
(CC1_CONV_SLOW)
B
Code stability
(CC1_RSL)
(1)
Operation with V
up to 80 V is supported when the charge pump is not in operation. Whenever the charge pump is in operation (in
BAT
5.5 V or 11 V mode), the maximum voltage on V
their maximum specified voltage.
(2)
Code stability is defined as the resolution such that the data exhibits 3-sigma variation within ±1-LSB.
(3)
Specified by a combination of design and production test
7.17 Current Measurement Digital Filter (CC2)
Typical values stated where T
to 80 V (unless otherwise noted)
PARAMETER
t
Conversion-time
(CC2_CONV)
t
Conversion-time in fast mode
(CC2_CONV_FAST)
Copyright © 2021 Texas Instruments Incorporated
= 25°C and V
= 59.2 V, min/max values stated where T
A
BAT
(1)
TEST CONDITIONS
V
- V
SRP
SRN
(4)
V
, V
SRP
SRN
(4)
16-bit, best fit over input voltage range, using
(3)
0 V common mode voltage.
16-bit, no missing codes
(3)
16-bit, uncalibrated
(3)
16-bit, post-calibration
16-bit, over ideal input voltage range
(4)
should be reduced to ensure the voltage on CP1, CHG, and DSG does not exceed
BAT
N-1
/ (5 x 2
) ≈ 1.24 / (5 x 2
REF2
= 25°C and V
= 59.2 V, min/max values stated where T
A
BAT
(1)
Single conversion (when operating from
LFO in 262.144kHz mode)
Single conversion (when operating from
LFO in 32.768kHz mode)
(2) (3)
Single conversion
should be reduced to ensure the voltage on CP1, CHG, and DSG does not exceed
BAT
= 25°C and V
= 59.2 V, min/max values stated where T
A
BAT
(1)
Single conversion, in NORMAL mode,
Settings:Configuration:Power
Config[FASTADC] = 0
Single conversion, in NORMAL mode,
Settings:Configuration:Power
Config[FASTADC] = 1
Product Folder Links:
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
15
) = 7.6µV
TEST CONDITIONS
TEST CONDITIONS
BQ769142
= -40°C to 85°C and V
A
BAT
MIN
TYP
MAX
–0.2
0.2
–0.2
0.2
±5.2
±22.3
±0.1
-1
1
–0.03
0.03 LSB/°C
130845
131454
132335 LSB/V
2
= -40°C to 85°C and V
A
BAT
MIN
TYP
MAX
250
4
14.3
= -40°C to 85°C and V
A
BAT
MIN
TYP
MAX
2.93
1.46
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BQ769142
= 4.7 V
UNIT
V
V
(2)
LSB
(2)
LSB
(2)
LSB
(2)
(2)
MΩ
= 4.7 V
UNIT
ms
s
bits
= 4.7 V
UNIT
ms
ms
15
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