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The BQ769142 device can then be programmed to enable REG0 and REG1 with the desired configuration, and
this setting can be programmed into OTP memory. Thus, at each later power-up, the device will autonomously
load the OTP settings and enable the LDO as configured, without requiring communications first.
12.4 Standalone Versus Host Interface
The BQ769142 device can be configured to operate in a completely STANDALONE mode, without any host
processor in the system, or together with a host processor. If in STANDALONE mode, the device can monitor
conditions, control FETs and an in-line fuse based on threshold settings, and recover FETs when conditions
allow, all without requiring any interaction with an external processor. If a host processor is present, the device
can still be configured to operate fully autonomously, while the host processor can read measurements and
exercise control as desired. In addition, the device can be configured for manual host control, such that the
device can monitor and provide a flag when a protection alert or fault has occurred, but will rely on the host to
disable FETs.
The host processor can interface with the BQ769142 device through a serial bus, as well as selected pin
controls. Serial bus communication through I
with the serial bus configured for I
differ for other versions of the device. The pin controls available include RST_SHUT, ALERT, CFETOFF,
DFETOFF, DDSG, and DCHG, which are described in detail below.
12.5 Multifunction Pin Controls
The BQ769142 device provides flexibility regarding the multifunction pins on the device, which includes the TS1,
TS2, TS3, CFETOFF, DFETOFF, ALERT, HDQ, DCHG, and DDSG pins. Several of the pins can be used as
active-high outputs with configurable output level. The digital output driver for these pins can be configured to
drive an output powered from the REG1 LDO or from the internal REG18 LDO, and thus when asserted active-
high will drive out the voltage of the selected LDO.
Note: the REG18 LDO is not capable of driving high current levels, so it is recommended to only use this LDO to
provide a digital output if it will be driving a very high resistance (such as > 1 MΩ) or light capacitive load.
Otherwise, the REG1 should be powered and used to drive the output signal.
The options supported on each pin include:
ALERT
Alarm interrupt output
HDQ communications
CFETOFF
Input to control the CHG FET (that is, CFETOFF functionality)
DFETOFF
Input to control the DSG FET (that is, DFETOFF functionality)
Input to control both the DSG and CHG FETs (that is, BOTHOFF functionality)
HDQ
HDQ communications
SPI MOSI pin
DCHG
DCHG functionality—A logic-level output corresponding to a fault that would normally cause the CHG driver to be disabled
DDSG
DDSG functionality—A logic-level output corresponding to a fault that would normally cause the DSG driver to be disabled
ALERT, CFETOFF, DFETOFF, HDQ, DCHG, and DDSG
General purpose digital output
Can be driven high or low by command
Can be configured for an active-high output to be driven from the REG1 LDO or the REG18 LDO
Copyright © 2021 Texas Instruments Incorporated
2
C (supporting speeds up to 400 kHz), SPI, or HDQ is available,
2
C by default in the BQ769142, while the default communications mode may
Product Folder Links:
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
BQ769142
BQ769142
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