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In reference to the system circuitry, the following features require attention for component placement and
layout: Differential Low-Pass Filter, and I
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The BQ769142 device uses an integrating delta-sigma ADC for current measurements. For best
performance, 100-Ω resistors should be included from the sense resistor terminals to the SRP and SRN
inputs of the device, with a 0.1-μF filter capacitor placed across the SRP and SRN pins. Optional 0.1-µF filter
capacitors can be added for additional noise filtering at each sense input pin to ground. All filter components
should be placed as close as possible to the device, rather than close to the sense resistor, and the traces
from the sense resistor routed in parallel to the filter circuit. A ground plane can also be included around the
filter network to add additional noise immunity.
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The BQ769142 device internal REG18 LDO requires an external decoupling capacitor, which should be
placed as close to the REG18 pin as possible, with minimized trace inductance, and connected to a ground
plane electrically connected to VSS.
2
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The I
C clock and data pins have integrated ESD protection circuits; however, adding a Zener diode and
series resistor on each pin provides more robust ESD performance.
18.2 Layout Example
An example circuit layout using the BQ76952 device in a 16-series cell design is described below. The design
implements the schematic shown in and uses a 2.75-inch × 3.9-inch 2-layer circuit card assembly, with cell
connections on the left edge, and pack connections along the top edge of the board. Wide trace areas are used,
reducing voltage drops on the high current paths.
The board layout, which is shown in
designator prefix E. These spark gaps are fabricated with the board and no component is installed.
Copyright © 2021 Texas Instruments Incorporated
2
C communication.
Figure 18-1
and
Figure
Product Folder Links:
BQ769142
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
18-2, includes spark gaps with the reference
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