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SPI_CS
SPI_SCLK
SPI_MOSI
SPI_MISO
The time required for the device to process commands and subcommands will differ based on the specifics of
each. The direct commands generally will complete within 50 μs, while subcommands can take longer, with
different subcommands requiring different duration to complete. For example, when a particular subcommand is
sent, the device requires approximately 200 μs to load the 32-byte data into the internal subcommand buffer. If
the host provides sufficient time for this load to complete before beginning to read the buffer (readback from
addresses 0x40 to 0x5F), the device will respond with valid data, rather than 0xFFFF00. When data has already
been loaded into the subcommand buffer, this data can be read back with approximately 50-μs interval between
SPI transactions. More detail regarding the approximate time duration required for specific commands and
subcommands is provided in the BQ769142 Technical Reference Manual (SLUUCF2).
The host software should incorporate a scheme to retry transactions that may not be successful. For example, if
the device returns 0xFFFFFF on SPI_MISO, then the internal clock was not powered, and the transaction will
need to be retried. Similarly, if the device returns 0xFFFFAA on a transaction, this indicates the previous
transaction encountered a CRC error, and so the previous transaction must be retried. And as described above,
if the device returns 0xFFFF00, then the previous transaction had not completed when the present transaction
was sent, which may mean the previous transaction should be retried, or at least needs more time to complete.
14.4 HDQ Communications
The HDQ interface is an asynchronous return-to-one protocol where a processor communicates with the
BQ769142 device using a single-wire connection to the ALERT pin or the HDQ pin, depending on configuration.
Both the master (host device) and slave (BQ769142) drive the HDQ interface using an open-drain driver, with a
pullup resistor from the HDQ interface to a supply voltage required on the circuit board. The BQ769142 device
can be changed from the default communication mode to HDQ communication mode by setting the
Settings:Configuration:Comm Type configuration register, or sending a subcommand (at which point the
device switches to HDQ mode immediately). Note that the SWAP_COMM_MODE() subcommand immediately
Copyright © 2021 Texas Instruments Incorporated
R/W bit & 7-bit
address # 3
R/W bit & 7-bit
address # 2
Figure 14-10. SPI Transaction #3 Without CRC
Product Folder Links:
SLUSE91A – SEPTEMBER 2020 – REVISED FEBRUARY 2021
8-bit write data
# 3 (or don't
care if read)
8-bit write or
read data # 2
BQ769142
BQ769142
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