Controller Core - GE MAC 1200 Service Manual

Resting ecg analysis system
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Controller Core

2-10
Functional Description: PCB Control CS_CI
The actual core comprises the Motorola Power PC MPC855T, which contains the
following integrated components.
Chipselect logic
DRAM controller
SCC and SMC for RS-232
SPI interface
I/O ports
Real-time clock counter register
In addition, the MPC855T contains a JTAG port with test and programming
capabilities.
The MPC855T has the following additional power supplies.
VDDSYN, filtered from the +3.3 V logic supply, for the clock generation.
KAPWR, generated from the +3.3 V logic supply or from a battery when device
is off, used for buffering the RTC Counter Register.
The clock generation for the MPC855T is realized by a quartz oscillator with 32.768
KHz. The system clock CLOCKOUT is adjusted with the internal PLL register. The
system frequency is 25 MHz.
The watchdog/reset generation is implemented separately in an integrated system
monitoring chip. It has the following functions.
Power-up reset for the MPC855T when the device is switched on.
Voltage monitoring of the +3.3 V and +5 V with reset generation.
Watchdog
Switchover to battery supply for patient ECG memory when device is switched
off.
Signal for access protection for patient ECG memory when device is switched
off.
MAC 1200 resting ECG analysis system
2012250-095
Revision D

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