External Codec/Gpio Expansion Header - J1 - Lantronix Open-Q 212A User Manual

Note
PM8916-1
U24 on Carrier
Board
U1 on Carrier Board
3.8.13 External Codec/GPIO Expansion Header – J1
J1 allows user to access SLIMBUS, I2S, power rails, and other GPIOs from APQ or PM8916-1 that are not
used by another peripheral on the carrier board. Please refer to the pinout table below for detail.
Table 13 External Codec/GPIO Expansion Header J1 Pinout
Description
Not Available on GPIO_0_BLSP1_SPI_MO
the 212A dev. kit SI
Not Available on GPIO_1_BLSP1_SPI_MI
the 212A dev. kit SO
BLSP1 bit 1 GPIO_2_BLSP1_SPI_CS
_N
(APQ GPIO 14)
Open-Q™ 212A Development Kit User Guide
Pin
Signal
#
VREG_L5_1P8 31
MB_VREG_3P3 33
MB_VREG_5P0 35
NC 37
GND 39
Figure 15 External Codec/GPIO Expansion Header (J1)
Signal
Pin
Signal
#
32 GND
34 GPIO_XX_MIC_SELECT
36 CDC_LINE_OUT_3
38 CDC_LINE_OUT_REF
40 CDC_LINE_OUT_4
Pin Pin
Signal
# #
1 2 GND
3 4 PM_GPIO_x_DIV_CLK2
5 6 PM_MPP_3
Open-Q 212A Development Kit
Note
APQ GPIO_51
Description
GND
PM8916-1
GPIO_2
PM8916-1 Multi-
Purpose Pin 3
32