Advantech PCI-1751 User Manual page 33

48-bit digital input/output card for pci bus
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Co u n t e r Op e r at i o n s
Re a d / W r i t e Op e r a t i o n
Before you write the initial count to each counter, you must first
specify the read/write operation type, operating mode and counter
type in the control byte and write the control byte to the control
register (BASE+27).
Since the control byte register and all three counter read/write
registers have separate addresses and each control byte specifies the
counter it applies to (by SC1 and SC0), no instructions on the operat-
ing sequence are required. Any programming sequence following the
8254 convention is acceptable.
There are three types of counter operation: read/load LSB, read /load
MSB and read /load LSB followed by MSB. It is important that you
make your read/write operations in pairs and keep track of the byte
order.
Co u n t e r Re a d -b a c k Co m m a n d
The 8254 counter read-back command lets you check the count value,
programmed mode and current states of the OUT pin and Null Count
flag of the selected counter(s). You write this command to the control
word register. The format is as shown at the beginning of this section.
The read-back command can latch multiple counter output latches.
Simply set the CNT bit to 0 and select the desired counter(s). This
single command is functionally equivalent to multiple counter latch
commands, one for each counter latched.
The read-back command can also latch status information for selected
counter(s) by setting STA bit = 0. The status must be latched to be
read; the status of a counter is accessed by a read from that counter.
The counter status format appears at the beginning of the chapter.
Appendix A Function of 8254 counter Chip
29
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