Advantech PCI-1751 User Manual page 25

Port 1
M11 M10 Description
0 0 Disable interrupt
0 1 Source = PC10
1 0 Source = PC10 & PC14
1 1 Source = Counter 2
Table 3-3: Interrupt mode bit values
In t e r r u p t Tr i g g e r i n g Ed g e Co n t r o l
The interrupt can be triggered by a rising edge or a falling edge of the
interrupt signal, selectable by the value written in the "triggering edge
control" bit in the interrupt control register, as shown in Table 3-4.
E0 or E1 Triggering edge of interrupt signal
1
0
Table 3-4: Triggering edge control bit values
In t e r r u p t Fl ag Bi t
The "interrupt flag" bit is a flag indicating the status of an interrupt. It
is a readable and writable bit. Read the bit value to find the status of
the interrupt, write "1" to this bit to clear the interrupt. This bit must
be cleared in the ISR to service the next incoming interrupt.
F0 & F1
Read 1
0
Write 1
0
Table 3-5: Interrupt flag bit values
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Port 0
M01 M00 Description
0 0 Disable interrupt
0 1 Source = PC00
1 0 Source = PC00 & PC04
1 1 Source = Timer 1
Rising edge trigger
Falling edge trigger
Interrupt status
Interrupt exists
No interrupt
Clear interrupt
Don't care
Chapter 3 Function Description 21