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PCI-1751U 48-bit Digital Input/Output Card with Universal PCI Bus User Manual...
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Acknowledgments PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are trademarks of International Business Machines Corporation. MS-DOS and Windows are trademarks of Microsoft Corporation. Intel and Pentium are trademarks of Intel Corporation.
Two other features give the PCI-1751U practical advantages in an indus- trial setting. When the system is hot reset (the power is not turned off) the PCI-1751U retains the last I/O port settings and output values if the user has set jumper JA1 to enable this feature. Otherwise, port settings and output values reset to their safe default state, or to the state deter- mined by other jumper settings.
• High density SCSI 68-pin connector • Output status readback • Two 16-bit timers can be cascaded to one 32-bit timer, and can generate watchdog timer interrupts • One 16-bit event counter can generate event interrupts • Keeps port I/O settings and digital output states after hot system reset •...
Chapter 2 Installation 2.1 Initial Inspection Before starting to install the PCI-1751U, make sure there is no visible damage on the card. We carefully inspected the card both mechanically and electrically before shipment. It should be free of marks and in perfect order on receipt.
2.3 Jumper Settings We designed the PCI-1751U with ease-of-use in mind. It is a "plug and play" card, i.e. the system BIOS assigns the system resources such as base address and interrupt automatically. There are only two functions with 11 jumpers to be set by the user. The following section describes how to configure the card.
Jumper JA1 below.) 2.3.3 Restore Ports to Condition Prior to Reset Jumper JA1 gives the PCI-1751U a new and valuable capability. With JA1 enabled, the PCI-1751U "memorizes" all port I/O settings and output values, and, in the event of a "hot" reset, the settings and output values present at the port just prior to reset are restored to each port following reset.
2.3.4 Select Clock Source of Timers and Counter Jumpers JP1, JP2 and JP3 are used to select the clock source of Timer 0, Timer 1 and Counter 2, respectively. Short the upper two pins of the jumpers to select an external clock source, or short the lower two pins to select an internal clock source.
Table 2.2. When there are multiple cards on the same chassis, this BoardID setting is useful for identifying each card's device number. We set the PCI-1751U’s BoardID switch to 0 at the factory. If you need to adjust this setting, please see below..
Gate control pins of Counter / Timer 0, 1 and 2 INT_OUT: Interrupt output. This pin changes to logic 1 whenever PCI- 1751U generates an interrupt, and returns to logic 0 when the interrupt is cleared. GND: Ground VCC: +5 VDC voltage output PCI-1751U User Manual...
2.7 Installation Instructions The PCI-1751U can be installed in any PCI slot in the computer. How- ever, refer to the computer user's manual to avoid any mistakes and dan- ger before you follow the installation procedure below: Turn off your computer and any accessories connected to the com- puter.
Chapter 3 Operation 3.1 Introduction This chapter describes the operating characteristics of the PCI-1751U. The driver software provided allows a user to access all of the card's func- tions without register level programming. Please see the User's Manual for the driver bundled with this card for more information. For users who...
3.2.2 Interrupt Function of the DIO Signals Two I/O pins (PC00 and PC10) can be used to generate hardware inter- rupts. A user can program the interrupt control register (Base + 32) to select the interrupt sources. Refer to "Interrupt Function" in this chapter for details about interrupt control.
Note: For wet contact configurations, a malfunction may occur if the internal resistance of the voltage source is significant (> 1.5 kW). It is advisable to connect a 1.5 kW resistor in parallel with such a voltage source to avoid a voltage rise inside the voltage source. PCI-1751U User Manual...
3.3 Timer/Counter Operation 3.3.1 Introduction The PCI-1751U includes one 8254 compatible programmable timer/ counter chip which provides three 16-bit counters, designated as Timer 0, Timer1 and Counter 2. Each has 6 operation modes. Timer 0 and Timer 1 can be used separately or can be cascaded to create one 32-bit timer.
16-bit timer; when set as an external source, then Counter 2 is an event counter. Counter 2 is set as mode 0 (interrupt on terminal count) in the driver provided by Advantech. 3.3.4 Timer/Counter Frequency and Interrupt The input clock frequency of the counter/timers is 10 MHz. The output of both Timer 1 and Counter 2 can generate interrupts for the system (refer to section 3.3).
Two lines in each I/O port (C0 and C4) and two of the three counter out- puts (Timer 1 and Counter 2) are connected to the interrupt circuitry. The "Interrupt Control Register" of the PCI-1751U controls how the combina- tion of the 6 signals generates an interrupt. Two interrupt request signals can be generated at the same time, and then the software can service these two request signals by ISR.
3.4.5 Interrupt Triggering Edge Control The interrupt can be triggered by a rising edge or a falling edge of the interrupt signal, selectable by the value written in the "triggering edge control" bit in the interrupt control register, as shown in Table 3-4. Table 3.4: Triggering edge control bit values E0 or E1 Triggering edge of interrupt signal...
1751U provides 10 MHz input frequencies to the counter chip from an on-board crystal oscillator. On the PCI-1751U, the 8254 chip's Timer 0 and Timer 1 can be used sep- arately or can be cascaded to create a 32-bit programmable timer by set- ting JP2.
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BASE+24/25/26 Status read-back mode Value Current state of counter output Null count is 1 when the last count written to the counter register has been loaded into the counting element PCI-1751U User’s Manual...
A.3 Counter Operating Modes A.3.1 MODE 0 – Stop on Terminal Count The output will be initially low after you set this mode of operation. After you load the count into the selected count register, the output will remain low and the counter will count. When the counter reaches the terminal count, its output will go high and remain high until you reload it with the mode or a new count value.
A.3.6 MODE 5 – Hardware Triggered Strobe The counter will start counting after the rising edge of the trigger input and will go low for one clock period when the terminal count is reached. The counter is retriggerable. PCI-1751U User’s Manual...
A.4 Counter Operations A.4.1 Read/Write Operation Before you write the initial count to each counter, you must first specify the read/write operation type, operating mode and counter type in the control byte and write the control byte to the control register (BASE+27). Since the control byte register and all three counter read/write registers have separate addresses and each control byte specifies the counter it applies to (by SC1 and SC0), no instructions on the operating sequence...
1751U interface card is a a very useful device. You can program timers 1 and 2 to serve as timers, event counters, square wave generators, or as a watchdog to generate regular interrupts at a fixed interval. PCI-1751U User’s Manual...