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Summary of Contents for Advantech PCI-1750
- Page 1 PCI-1750 32-channel Isolated Digital I/O Card User's Manual...
- Page 2 . A c k n o w l e d g m e n t s PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are trademarks of International Business Machines Corporation. MS- DOS, Windows, Microsoft C and Quick BASIC are trademarks of Microsoft Corporation.
- Page 3 PCI-1750 Block Diagram ........
- Page 4 General Information Chapter 1 General Information 1 1 1 1 1...
- Page 5 , t i m e r , d i g i t a l i n p u t s o r a c o m b i n a t i o n t o g e n e r a t e i n t e r r u p t s t o the PC. A user can easily configure the interrupts through software. The PCI-1750 uses a PCI controller to interface the card to the PCI bus. The controller fully implements the PCI bus specification Rev 2 .
- Page 6 • Dual interrupt handling capability • Timer / Counter interrupt capability generates watchdog timer i n t e r r u p t s Applications • D i g i t a l I / O c o n t r o l . •...
- Page 7 Storage temperature: Storage temperature: - 2 0 ~ 8 0 º C ( - 4 º F ~ 1 7 6 º F ) Humidity: Humidity: Humidity: Humidity: Humidity: 5% ~ 95% non-condensing 4 4 4 4 4 PCI-1750 User's Manual...
- Page 8 Installation Chapter 2 Installation 5 5 5 5 5...
- Page 9 . As you unpack the PCI-1750, check it for signs of shipping damage ( d a m a g e d b o x , s c r a t c h e s , d e n t s , e t c . ) I f i t i s d a m a g e d o r f a i l s t o m e e t s p e c i f i c a t i o n , n o t i f y o u r s e r v i c e d e p a r t m e n t o r y o u r l o c a l s a l e s representative immediately.
- Page 10 Location of Connectors Figure 2.1 shows the names and locations of connectors on the board. The PCI-1750 is a plug and play device. The PCI BIOS assigns the system resources automatically at system start-up. All functions can be set by software. No jumpers or switches are used on this card.
- Page 11 PCI-1750 Block Diagram IDI 0~7 IDI 8~15 IDO 0~7 IDO 8~15 Interrupt Control Logic Counter Counter 2 Figure 2.2: Block Diagram Figure 2.2: Block Diagram Figure 2.2: Block Diagram Figure 2.2: Block Diagram Figure 2.2: Block Diagram 8 8 8 8 8...
- Page 12 Counter2: I n p u t p i n o f i s o l a t e d c o u n t e r ( s h a r e d w i t h I D I 1 5 ) Counter2: Warning: Be careful when wiring digital input lines. Never apply a negative voltage to the isolated input pins, as this may damage the PCI-1750. Chapter 2 Installation 9 9 9 9 9...
- Page 13 Installation Instructions The PCI-1750 can be installed in any PCI slot in the computer. H ow ev - e r, re fer to the computer user's manual to avoid any m i s t a kes and danger before you follow the installation procedure below: 1 .
- Page 14 O p e r a t i o n Chapter 3 Function Description 1 1 1 1 1 1 1 1 1 1...
- Page 15 O p e r a t i o n This chapter describes the operation of the PCI-1750. The driver s o f t w a r e p r o v i d e d a l l o w s a u s e r t o a c c e s s a l l o f t h e c a r d ' s f u n c t i o n s without register level programming.
- Page 16 Warning! Be careful when wiring digital input cables. Never apply a negative voltage to an isolated input pin, as this may damage the PCI-1750. Note for wet contacts: Note for wet contacts: A malfunction might occur in cases where the...
- Page 17 MHz oscillator and its gate control pulled high (enabled). Counter 2 of the 8254 chip is a 16-bit high-speed (1 MHz) isolated event counter (it shares a pin with isolated IDI 15). The block diagram of the timer/ counter system of PCI-1750 is shown in Figure 3.3. PCI-1750 User's Manual...
- Page 18 Timers 0 and 1 are usually set in mode 3 (square wave generator) to generate periodic watchdog interrupts. Counter 2 can be set in mode 0 (stop on terminal count) for measuring frequency, or in mode 3 (square wave generator) to generate periodic watchdog interrupts or to be used as an event counter.
- Page 19 F o u r i n p u t c h a n n e l s ( I D I 0 , I D I 4, IDI 8 and IDI 12) and the output of Timer 1 and Counter 2 are connected to the interrupt circuitry. The "Interrupt Control Register" of the PCI-1750 controls how the combination of the six signals generates an interrupt. Two interrupt request signals, designated "interrupt group 0"...
- Page 20 M00 and M01: M00 and M01: M00 and M01: M00 and M01: "mode bits" of interrupt Group 0 M00 and M01: M10 and M11: M10 and M11: M10 and M11: M10 and M11: " m o d e b i t s " o f i n t e r rupt Group 1 M10 and M11: E 0 , E 1 : E 0 , E 1 :...
- Page 21 3 . 4 : I n t e r ru p t f u p t f u p t fl a g b i t v l a g b i t v l a g b i t values alues alues PCI-1750 User's Manual...
- Page 22 Function of 8254 Counter Chip Appendix A Function of 8254 counter Chip...
- Page 23 - b o a r d c r y s t a l o s c i l l a t o r . On the PCI-1750, the 8254 chip's Timer 0 and Timer 1 are cascaded to be a 32-bit programmable timer.
- Page 24 Description: Description: Description: Description: Description: SC1 & SC0 SC1 & SC0 SC1 & SC0 SC1 & SC0 SC1 & SC0 S e l e c t c o u n t e r . Counter Counter Counter Counter Counter Read-back command RW1 &...
- Page 25 C u r r e n t s t a t e o f c o u nter output O U T O U T Null count is 1 when the last count written to the counter register has been loaded into the counting element 2 2 2 2 2 2 2 2 2 2 PCI-1750 User's Manual...
- Page 26 Counter operating modes MODE 0 – Stop on terminal count T h e o u t p u t w i l l b e i n i t i a l l y l o w a f t e r y o u s e t t h i s m o d e o f o p e r a t i o n . A f t e r y o u l o a d t h e c o u n t i n t o t h e s e l e c t e d c o u n t r e g i s t e r , t h e o u t p u t will remain low and the counter will count.
- Page 27 . T h e c o u n t e r i s r e t r i g g e r a b l e . 2 4 2 4 2 4 2 4 2 4 PCI-1750 User's Manual...
- Page 28 Counter operations Read/write operation B e f o r e y o u w r i t e t h e i n i t i a l c o u n t t o e a c h c o u n t e r , y o u m u s t f i r s t specify the read/write operation type, operating mode and counter t y p e i n t h e c o n t r o l b y t e a n d w r i t e t h e c o n t r o l b y t e t o t h e c o n t r o l register [BASE + 27(Dec)].
- Page 29 . 2 6 2 6 2 6 2 6 2 6 PCI-1750 User's Manual...
- Page 30 Register Format of PCI-1750 Appendix B Register Format of PCI-1750...
- Page 31 Register Format of PCI-1750 Function Base Address (Decimal) Read Write IDI 0 ~ 7 IDO 0 ~ 7 IDI 8 ~ 15 IDO 8 ~ 15 2 ~ 23 Reserve Reserve 8254 Counter 0 8254 Counter 0 8254 Counter 1...
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