Table of Contents
Advertisement
8.4 PROTECTION SCHEMES
e) SENSITIVE GROUND IOC
The procedure to test this element is identical to that outlined in Phase IOC 1 on page 8–18, except that the current is
injected into the sensitive ground input terminals, and the element is not subject to the "phases required for operation", "lin-
ear reset timing", and "voltage restrained time overcurrent" tests.
The blocking from logic inputs check is different from that for Phase IOC 1 and is performed as follows:
1.
Inject current to cause a pickup.
2.
Assert a logic input to provide a "Blk Sens Gnd Inst". The Pickup LED should immediately go out.
3.
Repeat Steps 1 and 2 for logic inputs "Block Sens Gnd O/C", "Block All O/C" and "Block 1 Trip Relay" as required.
f) SENSITIVE GROUND DIRECTIONAL OC
The procedure to test this element is identical to that outlined in Neutral Directional OC on page 8–21, except that the oper-
ating current is the sensitive ground current.
a) NEGATIVE-SEQUENCE TOC
The procedure to test this element is identical to that outlined in Phase TOC 1 on page 8–16, except that current is injected
into any one phase of the phase input terminals and the negative sequence current magnitude is 1/3rd of the injected cur-
rent. The element is not subject to the "phases required for operation" or "voltage restrained time overcurrent" tests.
The blocking from logic inputs check is different from that for Phase TOC 1 and is performed as follows:
1.
Inject current to cause a pickup.
2.
Assert a logic input to provide a "Block Neg Seq Time". The Pickup LED should immediately go out.
3.
Repeat Steps 1 and 2 for logic input "Block All O/C" and "Block 1 Trip Relay" as required.
b) NEGATIVE-SEQUENCE IOC
The procedure to test this element is identical to that outlined in Phase IOC 1 on page 8–18, except that current is injected
into any one phase of the phase input terminals and the negative sequence current magnitude is 1/3rd of the injected cur-
rent. The element is not subject to the "phases required for operation", "linear reset timing", and "voltage restrained time
overcurrent" tests.
The blocking from logic inputs check is different from that for Phase IOC 1 and is performed as follows:
1.
Inject current to cause a pickup.
2.
Assert a logic input to provide a "Block Neg Seq Inst". The Pickup LED should immediately go out.
3.
Repeat Steps 1 and 2 for logic input "Block All O/C" and "Block 1 Trip Relay" as required.
c) NEGATIVE-SEQUENCE DIRECTIONAL OC
The procedure to test this element is identical to that outlined in Phase Directional OC on page 8–19, except the injected
8
current must be a negative sequence current.
d) NEGATIVE-SEQUENCE VOLTAGE
For Wye VTs, use the test connections specified in Figure 8–1: Relay Test Wiring – Wye Connection on page 8–3. A nega-
tive sequence voltage can be created by injecting a single phase voltage or a set of three single-phase voltages with a
known negative sequence component. For single phase injection, the negative sequence voltage magnitude is the injected
voltage divided by
3
To test pickup for Wye VTs, use the following procedure:
1.
Inject a negative sequence voltage of 0 into the bus voltage input of the relay. The Pickup LED should be off.
2.
Slowly raise the voltage until the Pickup LED comes on. This is the pickup level.
3.
Lower the voltage until the Pickup LED goes out. This is the reset voltage, which should be 2% of VT less than the
pickup level.
8-24
Courtesy of NationalSwitchgear.com
.
750/760 Feeder Management Relay
8.4.5 NEGATIVE-SEQUENCE OVERCURRENT AND VOLTAGE
8 COMMISSIONING TESTS
GE Multilin
Advertisement
Table of Contents
