Cypress FR81S CY91F52 Series Recommendation For Hardware Setup page 17

As you can see in Figure 16 the routing of these components is very important in order to reduce EMI effects. These
components have to be placed on the same layer as the MCU. The connection of C1 and C2 to the Vss pin must be
routed in a star way and so close as possible. The only vias should be placed to connect this ground star routing to the
ground plane in other layer, never use vias to connect these components with the corresponding MCU pins.
C3*
C1
4MHz
C2
Rd
0R
C3*, C4* : Stray
C4*
capacitance of PCB
For a proper performance of the oscillator circuit it is necessary to match the load capacitors (C
when the MCU, PCB or crystal are replaced for a different one.
As a result of this matching test the value of C
the Equation.
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Figure 16. Layout example for crystal oscillator circuit
DeCap C
on backside
Vias to ground plane
on inner layers
C1
Figure 17. Stray capacitance of PCB
CY91F52x
X0
Inverter
X1
L
Document No. 002-09375 Rev. *B
Recommendation for Hardware Setup 32-Bit FR81S Family
B
Vias to Vcc plane
on inner layers
CB
Ground plane on
inner layers
C2
SMD
Quartz Crystal
Equation: C calculation with stray capacitance of PCB.
L
is provided and then the calculation of C
, C ) with the crystal
1 2
and C can be done using
1 2
17