Eaton NZM2 Manual page 189

NZM-XDMI-DPV1
(PROFIBUS-DPV1 Interface for
DMI)
Variable access
(example)
LS_Status[25]
LS_Status[26]
LS_Status[27]
LS_Status[28]
LS_Status[29]
LS_Status[30]
LS_Status[31]
LS_Status[32]
LS_Status[33]
LS_Status[34]
LS_Status[35]
LS_Status[36]
LS_Status[37]
LS_Status[38]
LS_Status[39]
LS_Status[40]
LS_Status[45]
LS_Status[46]
LS_Status[47]
LS_Status[48]
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Data position Meaning
1)
Octet 28 Status of the phases L3 and neutral pole
Bit 0 Phase L3: Normal range
Bit 1 Phase L3: Load rejection prewarning
Bit 2 Phase L3: Overload range 1
Bit 3 Phase L3: Overload range 2
Bit 4 N-pole: Normal range
Bit 5 N-pole: Load rejection prewarning
Bit 6 N-pole: Overload range 1
Bit 7 N-pole: Overload range 2
1)
Octet 29 Tripping phase
Bit 0 Trip via L1
Bit 1 Trip via L2
Bit 2 Trip via L3
Bit 3 Trip via N-pole
Bit 4 Circuit-breaker is in the "ON" state
Bit 5 Circuit-breaker is in the "OFF" state
Bit 6 Circuit-breaker is in the "Tripped" state
Bit 7 Normal operation of the circuit-breaker
(communication in order)
1)
Octet 30 Phase issuing alarm
Bit 0 to Bit 3 Not used
Bit 4 Alarm from L1
Bit 5 Alarm from L2
Bit 6 Alarm from L3
Bit 7 Alarm from N-pole
11/04 MN01219002Z-EN