Rastergraf
Note
Please read these sections before starting on this chapter:
Section 1.2
Chapter 2
Chapter 3
This chapter includes the following other sections:
4.2 Imagine 128 Series 2 (I128S2) Graphics Accelerator
4.3 VFX-M Auxiliary Registers
4.4 TVP3030 RAMDAC
4.5 Video Timing Parameters
4.6 VFX-M Interrupts
4.7 Flash EEPROM
4.8 Serial EEPROM
Because the VFX-M is mostly an assembly of "black box" parts, there
isn't a lot of external logic that has to be documented. Thus, the following
sections don't actually provide much programming information, as the
chip documentation and GLP source code cover that pretty well. The
sections summarize the devices and include some "hints and kinks".
The following sections assume that you have read Section I.2 and have
some knowledge of the PCI bus. For detailed information concerning
operation of the PCI bus, please refer to the Section I.3, Additional
References.
Time Saving Note
One thing that isn't obvious from the block diagram is that the TVP3030
RAMDAC (Section 4.4) and the VFX-M Auxiliary Control Register
(Section 4.3) share the 16 register block in the I128S2 that is allocated to
the RAMDAC. This is explained in Section 4.2.10.
4-2 Troubleshooting
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Functional description of the VFX-M board.
Installation
Summary of software support from Rastergraf.
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