Rastergraf VFX-M User Manual page 19

Rastergraf
Video Display:
Pixel Clock:
Scroll, Pan, and Zoom:
Color Map:
PMC (PCI) Bus Access:
PCI bus Interrupts:
Bus Loading:
1-8 General Information
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The Texas Instrument TVP3030 color lookup table (CLUT)
resolves the display priority between the primary, overlay,
and cursor (last through first, respectively) screens.
For 8-bit applications, the pixel size is 8 bits, and there is 1
byte per pixel. For 16 and 32 bit applications the pixel is
divided into Red, Green, and Blue components. A color
key can be used to switch the TVP3030 from passing the
RGB components straight through to sampling the pixel to
the color map, thus providing a mapped overlay value.
The TVP3030 RAMDAC contains a programmable pixel
clock generator. This allows the pixel clock to be set to
virtually any frequency between 5 and 250 MHz. The
upper range can be extended to 270 MHz by special order.
Scroll - single line (smooth scroll).
Pan - anywhere on 16 byte boundaries
Zoom: vertical (incremental)
horizontal: sub-integer, uses the TVP3030
PLL to adjust master pixel clock.
The VFX-M video output uses a TI TVP3030. The input
multiplexer can be programmed to correspond to the pixel
size of 8, 16, or 32-bpp by operating in 16:1, 8:1 or 4:1
(respectively) mux mode.
It supports VGA and common interlaced and non-
interlaced displays ranging from 640 x 480 up to better
than 1600 x 1280. The TVP3030 has a 64 x 64 x 2
bitmapped cursor. The DAC outputs are 8-bits.
All VFX-M registers and memory are accessible to the PCI
bus through the I128S2's integral PCI bus bridge. The
I128S2 provides programmable Bus Address Registers
(BARs) that map control registers, drawing engine
registers, and memories. A 16 MB memory-mapped
windows gives direct access to VRAM, while a 32 MB
window enable access to one-half of the 64 MB pixmap
memory.
The I128S2 can cause an interrupt on the INTA line.
One PCI 2.1 compatible load