Program Switch; Usb Port (J22) - Xilinx Virtex-5 FPGA ML550 User Manual

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Program Switch

The ML550 Development Board provides a push-button program switch (SW12) for
initiating the configuration of the Virtex-5 FPGA. This switch is used to force a
reconfiguration of the FPGA from PROMs if they are present and enabled. The ML550
Development Board does not include PROMs.
The primary configuration device is the System ACE Controller (U13), which loads image
files from a CompactFlash card. The mode DIP switch (SW11) must be set to the proper
mode for configuration to occur via the System ACE interface (refer to
Modes" on page 45
push button simply clears the FPGA configuration on this board.

USB Port (J22)

The ML550 development board provides a USB "B" connector for interface to a PC (using
a USB B-to-A cable.) The board uses a Silicon Labs 3.3V CP2102 USB-to-RS232 converter
device (U2) to drive the RD, TD, RTS, and CTS signals to the FPGA via a Maxim MAX3008
level translator (U20). The user must provide a UART core internal to the FPGA to enable
serial communication. A Silicon Labs CP2102 driver file is included on the ML550
development kit CD. This driver allows a PC USB port to be configured as a serial COM
port for the user to continue working with serial communication utilities like
HyperTerminal or Tera Term Pro.
Table 3-8
assignments.
Table 3-8: RS-232 Interface Signal Names and Pin Assignments
USB CP2102
USB
J22 USB I/F
Signal
Pin # U2 Pin #
1 USB_VBUS 8
2 USB_D- 5
3 USB_D+ 4
4 GND 3
ML550 Networking Interfaces Platform
UG202 (v1.4) April 18, 2008
for further information regarding setting mode jumpers). The PROG
describes the USB interface signal names and their respective Virtex-5 FPGA pin
CP2102 CP2102
RS232 I/F RS232
U2 Pin # Signal
28 USB_DTR_I_B
27 USB_DSR_I_B
26 USB_TX_O
25 USB_RX_I
24 USB_RTS_O_B
23 USB_CTS_I_B
9 USB_RESET_I_B
12 USB_SUSPEND_O
www.xilinx.com
U20 U20 U20 to FPGA
USB-Side FPGA-Side
Pin # Pin # Signal Name
7 14 USB_DTR_B
3 18 USB_DSR_B
8 13 USB_TX
4 17 USB_RX
9 12 USB_RTS_B
5 16 USB_CTS_B
1 20 USB_RESET_B
6 15 USB_SUSPEND
Program Switch
"Configuration
FPGA U9
2.5V I/O Bank 11
Pin #
C33
D34
B33
C34
A33
D32
B32
C32
27