Bit determination of standard event enable register:
Bit
position
7
6
5
4
3
2
1
0
*ESE?
This order can read the value of standard event status register.
Quest syntax
*ESE?
Parameter
None
Return parameter
<NR1>
*ESR?
This order can read the value of standard event status register. After executing
this order, standard event status register is reset. Bit definition of standard
event status register is as the same as the standard event status enable
register.
Quest syntax
*ESR?
Parameter
None
Return parameter
<NR1>
Reference order
*CLS
*ESE
*ESE?
Bit Name
PON(Power-on)
not used
CME(Command error)
EXE(Execution error)
DDE(Device-dependent error)
QYE(Query error)
not used
OPC(Operation complete)
Copyright © Itech Electronic Co., Ltd.
IEEE488.2 Common Order
Bit
Weight
128
-
32
16
8
4
-
1
36
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