Supermicro X10DBT User Manual page 86

Table of Contents

Advertisement

X10DBT/X10DBT-T User's Manual
Unused Memory Channel Input
Select Enabled to allow input from unused memory channels. The options are
Enabled and Disabled.
Command 2 Data Tuning
Select Enabled to fine-tune electrical command paths from the host system to
the memory-extension buffer (MXB). The options are Enabled and Disabled.
JordonCreek Power Management
Select Enabled to activate power management features embedded in the Jordon
Creek chip for the Intel Scalable Memory Interconnect 2 (Intel SMI 2) controller.
The options are Enabled and Disabled.
MRC Debug Level
Use this feature to set the debugging level for memory reference codes, which
are used for memory multiple threads initialization. The options are L0, L1 and L2.
Halt on Memory Fatal Error
Select Enabled to put the system on hold when a memory fatal error occurs.
The options are Enabled and Disabled.
Promote MEM (Memory) Train Err (Error)
Select Enabled to promote warnings when a memory training-error occurs. The
options are Enabled and Disabled.
Promote MEM (Memory) RAS Warnings
Select Enabled to promote warnings pertaining to RAS (Reliability, Availability,
Serviceability) issues. The options are Enabled and Disabled.
Memory Test
When this feature is set to Enabled, memory tests will be performed in the sys-
tem. The options are Enabled and Disabled.
JCK (Jordon Creek) per DIMM Parity Error Enable
Select Enabled for the system to monitor and keep track of DIMM parity errors
occurred on each DIMM module. The options are Enabled and Disabled.
DRAM RAPL (Running Average Power Limit) Mode
Use this feature to set the run-time power-limit mode for DRAM modules. The
options are Disabled, VR Measured and Estimated.
4-26

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

X10dbt-t

Table of Contents