Supermicro X10DBT User Manual page 70

X10DBT/X10DBT-T User's Manual
Turbo Mode
Select Enabled to use the Turbo Mode to boost system performance. The options
are Enable and Disable.
P-state Coordination
This feature is used to change the P-state (Power-Performance State) coordi-
nation type. P-state is also known as "SpeedStep" for Intel processors. Select
HW_ALL to change the P-state coordination type for hardware components only.
Select SW_ALL to change the P-state coordination type for all software installed
in the system. Select SW_ANY to change the P-state coordination type for a soft-
ware program in the system. The options are HW_All, SW_ALL, and SW_ANY.
 CPU C State Control (Available when Power Technology
is set to Custom)
C2C3TT (C2-to-C3 Transaction Timer)
This feature sets the transaction timer from C2 to C3. Enter 0 for Auto, which
will allow the BIOS to configure the transaction timer automatically. The Default
setting is 0 (Auto).
Package C State limit
Use this item to set the limit on the C-State package register. The options are
C0/1 state, C2 state, C6 (non-Retention) state, and C6 (Retention) state.
CPU C3 Report
Select Enable to allow the BIOS to report the CPU C3 State (ACPI C2) to the
operating system. During the CPU C3 State, the CPU clock generator is turned
off. The options are Enable and Disable.
CPU C6 Report (Available when Power Technology is set to Custom)
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the
operating system. During the CPU C6 state, power to all cache is turned off.
The options are Enable and Disable.
Enhanced Halt State (C1E)
Select Enabled to use the "Enhanced Halt State" feature, which will significantly
reduce CPU power consumption by reducing the CPU's clock cycle and voltage
during a "Halt State." The options are Disable and Enable.
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